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LP3992-18B5F

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by Ray

LOWPOWER Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-23-5. Datasheet-verified pinout, KiCad symbol/footprint/3D.

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3D Model

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Symbol & Footprint

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PCB Footprint

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Datasheet

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Contents

README

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LP3992-18B5F

LOWPOWER · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-5

LP3992-18B5F from LOWPOWER, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VIN power_in Power input voltage. Recommended operating range 2.5V to 5.5V (absolute max 6.5V). Bypass with >=1µF ceramic/tantalum capacitor located within 0.5 inch of the pin to a clean analog ground.
2 GND power_in Ground reference for the regulator. Return input and output capacitors to a clean analog ground.
3 EN input Chip enable, active high, TTL-logic-controlled. VIH >= 1.4V turns the LDO on; VIL <= 0.4V forces shutdown mode (<0.01µA typ). Input bias current 1.5µA typ at VEN=3V. If unused, tie to VIN for always-on operation.
4 NC unconnected No internal connection. Leave floating or tie to ground for mechanical support.
5 VOUT power_out Regulated 1.8V output (LP3992-18 variant), up to 300mA load current. Requires >=1µF low-ESR ceramic output capacitor (ESR > 25mΩ range) located within 0.5 inch of the pin for stability. Current-limited to ~450mA typ; internal thermal shutdown at 150°C.

Key specifications

Parameter Value
Manufacturer LOWPOWER
Package SOT-23-5
Category PMIC
Pins 5

Ordering variants

Same part, different packaging or reel option.

  • LP3992-18B5F
  • LP3992-18B5FJ5F
  • LP3992-18B5FB3F

CAD (KiCad official)

  • Symbol: LP3992-18B5F
  • Footprint: Package_TO_SOT_SMD:SOT-23-5
  • 3D model: SOT-23-5 (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
lp3992-18b5f.step 85 KB You want the bare part, or you mark your own boards.
lp3992-18b5f-etched.step 2.4 MB You want the part with LP3992-18B5F already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 582 faces against 102 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: LOWPOWER datasheet (9 pp, sha256 c4874862660fdd11, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF