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Contents

README

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LP3981-25B5F

LOWPOWER · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-5

LP3981-25B5F from LOWPOWER, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VIN power_in Power input voltage. Recommended supply range 2.5V to 5.5V (absolute max 6V). Requires >=1uF ceramic/tantalum bypass capacitor located within 0.5 inch of the pin.
2 GND power_in Ground reference for the LDO. Return path for input/output bypass capacitors; tie to a clean analog ground.
3 EN input Chip Enable, active high (TTL-compatible). VIH >= 1.2V starts up the LDO; VIL <= 0.4V puts it into shutdown. High-impedance pin - add a 100k pull-down to GND if the control signal can float, or tie to VIN to keep the regulator continuously on.
4 NC unconnected No internal connection. Leave floating or tie to any convenient net.
5 VOUT power_out Regulated 2.5V output (fixed, ±2% accuracy). Delivers up to 300mA continuous (550mA peak), current-limited to 360-400mA. Requires >=1uF low-ESR (>25mΩ) ceramic output capacitor within 0.5 inch of the pin for stability.

Key specifications

Parameter Value
Manufacturer LOWPOWER
Package SOT-23-5
Category PMIC
Pins 5

Ordering variants

Same part, different packaging or reel option.

  • LP3981-25B5F

CAD (KiCad official)

  • Symbol: LP3981-25B5F
  • Footprint: Package_TO_SOT_SMD:SOT-23-5
  • 3D model: SOT-23-5 (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: LOWPOWER datasheet (6 pp, sha256 bf3050f50c362057, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF