component
LP28056SPF
Public Unreviewedby Ray
LOWPOWER Battery Management, ESOP-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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Contents
README
markdownLP28056SPF
LOWPOWER · Battery Management · ESOP-8
LP28056SPF from LOWPOWER, in a ESOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | NC | unconnected | No connect. Leave floating or tie to ground per PCB layout preference. |
| 2 | ISET | input | Charge current program, charge current monitor, and shutdown pin. A resistor RISET from this pin to GND programs the charge current: IBAT = 1000V / RISET (e.g. 1kΩ → 1000mA, 2kΩ → 500mA). Pin voltage is ~1V in current mode; leaving RISET open (NC) puts the device into shutdown (~50µA supply, ±1µA on BAT). |
| 3 | VSS | power_in | Signal ground (system ground reference). Connect to the ground plane along with PGND. |
| 4 | VIN | power_in | Input power source, 4.5V to 6.5V (typ 5V, absolute max 8V). Connect to a wall adapter or USB 5V rail. Bypass with ~10µF to GND close to the pin. |
| 5 | BAT | power_out | Charge current output to the single-cell Li-ion battery. Regulated to 4.2V ±1% float voltage; sources up to 1200mA. Requires a 10µF tantalum cap for stability if no battery is present, otherwise a 0.1µF ceramic when a battery is connected. |
| 6 | STAT2 | output | Open-drain charge status output (active-low when charge complete). During charging, this pin is high impedance (external pull-up pulls HIGH); when the charge cycle terminates, an internal N-channel MOSFET pulls it LOW. Requires an external pull-up resistor (typ. to LED or MCU rail). |
| 7 | STAT1 | output | Open-drain charge status output (active-low while charging). During charging, an internal N-channel MOSFET pulls this pin LOW; when the charge cycle completes, the pin goes high impedance (external pull-up pulls HIGH). Requires an external pull-up resistor. |
| 8 | NC | unconnected | No connect. Leave floating or tie to ground per PCB layout preference. |
| 9 | PGND | power_in | Power ground / exposed thermal pad on the ESOP-8 underside. Must be soldered to the PCB ground plane for both electrical return of the charge current and thermal dissipation (θJA = 50°C/W). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | LOWPOWER |
| Package | ESOP-8 |
| Category | PMIC |
| Pins | 9 |
Ordering variants
Same part, different packaging or reel option.
LP28056SPF
CAD (KiCad official)
- Symbol:
LP28056SPF - Footprint:
Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm - 3D model: ESOP-8 (KiCad packages3D, STEP)
3D model downloads
Two STEP files. Same geometry, different body top:
| File | Size | Use it when |
|---|---|---|
lp28056spf.step |
125 KB | You want the bare part, or you mark your own boards. |
lp28056spf-etched.step |
2.4 MB | You want the part with LP28056SPF already on it. |
The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 575 faces against 152 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: LOWPOWER datasheet (8 pp, sha256
d88550970528eed6, retrieved 2026-08-17, tier: lcsc) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).