component
LN4201SF-G
Public Unreviewedby Ray
JSMSEMI Isolators - Gate Drivers, SOP-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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Contents
README
markdownLN4201SF-G
JSMSEMI · Isolators - Gate Drivers · SOP-8
LN4201SF-G from JSMSEMI, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VCC | power_in | Low-side supply voltage. Recommended operating range 10 V to 20 V (absolute max 25 V). VCC UVLO thresholds: rising ~8.9 V, falling ~8.2 V, hysteresis ~0.7 V. Decouple to VSS with a local ceramic capacitor. |
| 2 | HIN | input | High-side logic input. CMOS/LSTTL compatible; VIH ≥ 2.5 V, VIL ≤ 0.8 V referenced to VSS. Drives the high-side output HO through the level shifter. Compatible with 3.3 V / 5 V / 15 V logic. |
| 3 | LIN | input | Low-side logic input. CMOS/LSTTL compatible; VIH ≥ 2.5 V, VIL ≤ 0.8 V referenced to VSS. Drives the low-side output LO. Compatible with 3.3 V / 5 V / 15 V logic. |
| 4 | VSS | power_in | Chip ground / logic and low-side power return (also labelled COM on the top-view symbol). Common reference for all VCC, HIN, LIN, and LO signals. |
| 5 | LO | output | Low-side gate-drive output, referenced to VSS. Typical source/sink capability 300 mA / 600 mA (min 200/400 mA). Swings between VSS and VCC. Connect through a gate resistor to the low-side power MOSFET gate. |
| 6 | VS | power_in | High-side floating return. Connects to the source of the high-side power MOSFET / half-bridge switch node. Rated up to 700 V; can swing to -9 V (transient VSS-50 V, 50 ns pulse). Return node for HO and the bootstrap capacitor. |
| 7 | HO | output | High-side floating gate-drive output, referenced to VS. Swings between VS and VB. Typical source/sink capability 300 mA / 600 mA. Connect through a gate resistor to the high-side power MOSFET gate. |
| 8 | VB | power_in | High-side floating bootstrap supply. Recommended VS+10 V to VS+20 V; absolute max 725 V. Powers the high-side driver via an external bootstrap capacitor from VCC through a bootstrap diode. VBS POR/UVLO monitors this rail. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | JSMSEMI |
| Package | SOP-8 |
| Category | PMIC |
| Pins | 8 |
Ordering variants
Same part, different packaging or reel option.
LN4201SF-G
CAD (KiCad official)
- Symbol:
LN4201SF-G - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOP-8 (KiCad packages3D, STEP)
3D model downloads
Two STEP files. Same geometry, different body top:
| File | Size | Use it when |
|---|---|---|
ln4201sf-g.step |
122 KB | You want the bare part, or you mark your own boards. |
ln4201sf-g-etched.step |
1.8 MB | You want the part with LN4201SF-G already on it. |
The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 466 faces against 147 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: JSMSEMI datasheet (7 pp, sha256
354e0f23375d21a6, retrieved 2026-08-17, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).