Loads on click. Unloads when scrolled away or the tab is hidden.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads on click. Unloads when scrolled away or the tab is hidden.

PCB Footprint

Open full view ↗
Loads on click. Unloads when scrolled away or the tab is hidden.
Loads on click. Unloads when scrolled away or the tab is hidden.
Download PDF
Contents

README

markdown

LN4056A

NATLINEAR · Battery Management · ESOP-8

LN4056A from NATLINEAR, in a ESOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 TEMP input Battery NTC thermistor sense input. Charging is paused when VTEMP is outside 30%*VIN (VLOW) to 60%*VIN (VHIGH), indicating an over/under temperature battery fault; charging resumes when VTEMP returns to within range.
2 ISET bidirectional Charge current program, monitor, and shutdown pin. A 1% resistor to GND sets charge current per IBAT = (VISET/RISET) * 960; pin holds ~1V in constant-current mode. Floating the resistor allows an internal 3uA pull-up to trigger shutdown at 1.21V (clamped ~2.4V), reducing input current to ~25uA.
3 GND power_in Ground reference. The EXPOSED thermal pad must also be connected to pin 3 (GND) to improve heat dissipation for reliable operation.
4 VIN power_in Positive supply input, 4.25V to 6.5V. Requires at least a 1uF bypass capacitor. When VIN falls to within 30mV of VBAT, charging stops and BAT sink current drops below 0.1uA.
5 VBAT power_out Battery output pin; connect to the positive terminal of the single-cell Li-ion battery. Sinks ~2uA when fully charged with VIN present, and <0.1uA when VIN is removed (sleep mode).
6 DONE output Open-drain charge-complete indicator. Pulled low when charging has terminated; high-impedance otherwise. VOL ~0.35V at 5mA sink.
7 CHRG output Open-drain charge-in-progress indicator. Pulled low while charging the battery; high-impedance otherwise. VOL ~0.35V at 5mA sink.
8 CE input Chip enable. Drive high to enable charging, drive low to disable charging; in shutdown the quiescent current is below 20uA.
9 EP power_in Exposed thermal pad on the underside of the ESOP-8 package. Must be connected to GND (pin 3) to provide the primary thermal path and ensure stable operation at high charge currents.

Key specifications

Parameter Value
Manufacturer NATLINEAR
Package ESOP-8
Category PMIC
Pins 9

Ordering variants

Same part, different packaging or reel option.

  • LN4056AS

CAD (KiCad official)

  • Symbol: LN4056A
  • Footprint: Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm
  • 3D model: ESOP-8 (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: NATLINEAR datasheet (8 pp, sha256 4e66b5b972d5df57, retrieved 2026-08-17, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF