LMR16020PDDAR from Texas Instruments, in a SOIC-8-EP. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	BOOT	passive	Bootstrap capacitor connection for high-side MOSFET driver. Connect a high quality 0.1 µF capacitor from BOOT to SW. Absolute max BOOT-to-GND = 71 V; BOOT-to-SW = 6.5 V.
2	VIN	power_in	Power supply input, 4.3 V to 60 V operating (65 V absolute max). Connect bypass capacitor CIN between VIN and GND with minimum trace length.
3	EN	input	Enable pin with internal pull-up current source. Pull below 1.2 V (typ threshold 1.20 V) to disable; float or tie to VIN to enable. Can be driven by a resistor divider from VIN to program the input under-voltage lockout.
4	RT/SYNC	bidirectional	Resistor Timing or External Clock input. A resistor from RT/SYNC to GND sets the switching frequency (200 kHz-2.5 MHz). Driving the pin above the PLL threshold switches it to a synchronization input (250 kHz-2.3 MHz); if clocks stop, it reverts to resistor-programmed mode.
5	FB	input	Feedback input pin. Connect to the resistor divider from VOUT to set the output voltage; internal reference VFB = 0.750 V (typ). Do not short this pin to GND during operation.
6	PGOOD	output	Power-Good open-drain output flag. Use a 10 kΩ to 100 kΩ pull-up resistor to a logic rail or DC voltage no higher than 7 V. Asserts when FB is within roughly 94%-107% of the reference.
7	GND	power_in	System ground pin. Return for VIN bypass and internal control circuitry.
8	SW	power_out	Switching output of the regulator, internally connected to the high-side power MOSFET (155 mΩ RDS(on)). Connect to the power inductor and to the catch diode's cathode. SW-to-GND rating: -3 V to 65 V absolute max.
9	Thermal Pad	power_in	Exposed thermal pad on package underside; primary heat dissipation path from the die. Must be soldered to the PCB ground plane for proper thermal performance and electrical ground reference.

Key specifications

Parameter	Value
Manufacturer	Texas Instruments
Package	SOIC-8-EP
Category	PMIC
Pins	9

Ordering variants

Same part, different packaging or reel option.

LMR16020PDDAR

CAD (KiCad official)

Symbol: LMR16020PDDAR
Footprint: Package_SO:TI_SO-PowerPAD-8
3D model: SOIC-8-EP (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File	Size	Use it when
`lmr16020pddar.step`	123 KB	You want the bare part, or you mark your own boards.
`lmr16020pddar-etched.step`	2.6 MB	You want the part with `LMR16020PDDAR` already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 635 faces against 147 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Texas Instruments datasheet (36 pp, sha256 98a8cc9ee1109f35, retrieved 2026-08-17, tier: manufacturer)
Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF