component
lm5160qpwprq1
Public Unreviewedby Ray
Texas Instruments DC-DC Converters, HTSSOP-14-EP. Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
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README
markdownLM5160QPWPRQ1
Texas Instruments · DC-DC Converters · HTSSOP-14-EP
LM5160QPWPRQ1 from Texas Instruments, in a HTSSOP-14-EP. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | AGND | power_in | Analog Ground. Ground connection of internal control circuits. Should be tied to the exposed thermal pad and to the PCB ground plane. |
| 2 | PGND | power_in | Power Ground. Ground connection of the internal low-side synchronous rectifier FET; carries the switching current return. |
| 3 | VIN | power_in | Input supply connection. Operating input voltage range is 4.5 V to 65 V (absolute max 70 V). Requires local input decoupling capacitance. |
| 4 | EN/UVLO | input | Precision enable / undervoltage lockout comparator input. Used to enable the converter and to set the input UVLO threshold and hysteresis via an external resistor divider from VIN. |
| 5 | RON | input | On-time programming pin. A resistor between this pin and VIN sets the switch on-time as a function of input voltage, producing nearly constant switching frequency up to 1 MHz. |
| 6 | SS | input | Soft-start. Connect a capacitor from SS to AGND to control the output voltage rise time at start-up and limit inrush/overshoot. |
| 7 | NC | unconnected | No Connection. Leave floating or tie to AGND per layout guidelines. |
| 8 | FPWM | input | Forced PWM logic input pin. Tie to AGND for discontinuous conduction mode (DCM) at light load for higher efficiency; tie to VCC for continuous conduction mode (CCM) at all loads (required for Fly-Buck configuration). Absolute max 14 V. |
| 9 | FB | input | Feedback input of the voltage regulation comparator. Connect the output voltage divider tap here; internal reference gives ±1% regulation. |
| 10 | VCC | power_out | Internal high-voltage start-up regulator bypass capacitor pin. Provides the internal bias rail (nominal ~7 V, absolute max 14 V); bypass to AGND with a ceramic capacitor. Do not load externally beyond datasheet limits. |
| 11 | BST | power_in | Bootstrap capacitor pin for the high-side buck FET gate driver. Connect a capacitor between BST and SW (typ. 0.1 µF). Absolute max 14 V above SW, 84 V above AGND. |
| 12 | SW | power_out | Switch node. Source of the high-side buck FET and drain of the low-side synchronous rectifier FET. Connects to the external inductor; carries the switching waveform. |
| 13 | SW | power_out | Switch node (duplicate of pin 12). Source of the high-side buck FET and drain of the low-side synchronous rectifier FET. |
| 14 | NC | unconnected | No Connection. Leave floating or tie to AGND per layout guidelines. |
| 15 | EP | power_in | Exposed thermal pad on the underside of the HTSSOP package. Connect to AGND and to the PCB ground plane to improve power dissipation; this is the primary thermal path. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | HTSSOP-14-EP |
| Category | PMIC |
| Pins | 15 |
Ordering variants
LM5160QPWPRQ1QPWPQ1LM5160QPWPRQ1LM5160QPWPRQ1QPWPTQ1
CAD (KiCad official)
- Symbol:
LM5160QPWPRQ1 - Footprint:
Package_SO:TSSOP-14-1EP_4.4x5mm_P0.65mm - 3D model: HTSSOP-14-EP (KiCad packages3D, STEP)
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (None pp, sha256
8402782c9ba13b0c, retrieved 2026-08-17, tier: manufacturer) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).
Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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