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Contents

README

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LKS32MC083C8T8

LINKOSEMI · Microcontrollers (MCU/MPU/SOC) · TQFP-48(7x7)

LKS32MC083C8T8 from LINKOSEMI, in a TQFP-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 ADC_CH4/DAC_OUT/P0.0 bidirectional GPIO P0.0 muxed with ADC channel 4 input and 12-bit DAC output. Internal software-enabled 10 kΩ pull-up to AVDD.
2 RSTN/P0.2 bidirectional System reset input (active low) by default, alternately GPIO P0.2. Internal 100 kΩ pull-up to AVDD fixed on; external 10 nF-100 nF cap to GND recommended, with optional 10-20 kΩ external pull-up.
3 AVSS power_in System analog/digital ground return.
4 AVDD power_in Main chip power input, 2.2-5.5 V (B revision 3.0-5.5 V). External decoupling cap ≥1 µF recommended, placed close to AVDD.
5 P3.2 bidirectional General-purpose I/O P3.2.
6 SCL/TIM2_CH0/ADC_CH7/P0.3 bidirectional GPIO P0.3 muxed with I2C SCL, Timer2 channel 0, and ADC channel 7.
7 SDA/TIM2_CH1/ADC_CH8/P0.4 bidirectional GPIO P0.4 muxed with I2C SDA, Timer2 channel 1, and ADC channel 8.
8 ADC_CH9/P0.5 bidirectional GPIO P0.5 muxed with ADC channel 9.
9 UART1_TX(RX)/TIM1_CH0/CAN_RX/P0.6 bidirectional GPIO P0.6 muxed with UART1 TX or RX (swappable), Timer1 channel 0, and CAN RX. Internal software-enabled 10 kΩ pull-up.
10 UART1_TX(RX)/TIM1_CH1/CAN_TX/P0.7 bidirectional GPIO P0.7 muxed with UART1 TX or RX, Timer1 channel 1, and CAN TX. Internal software-enabled 10 kΩ pull-up.
11 MCPWM_CH1P/TIM2_CH0/P2.11 bidirectional Motor-control PWM channel 1 high-side output, muxed with Timer2 channel 0 and GPIO P2.11.
12 MCPWM_CH1N/TIM2_CH1/ADC_TRIG2/P2.12 bidirectional Motor-control PWM channel 1 low-side output, Timer2 channel 1, ADC trigger 2 and GPIO P2.12.
13 HALL_IN0/TIM3_CH0/ADC_CH15/CMP0_IP1/P0.11 bidirectional Hall-sensor phase A input; muxed with Timer3 channel 0, ADC channel 15, comparator 0 non-inverting input 1, and GPIO P0.11. Wake source.
14 HALL_IN1/TIM3_CH1/CAN_RX/ADC_CH16/CMP0_IP2/P0.12 bidirectional Hall-sensor phase B input; muxed with Timer3 channel 1, CAN RX, ADC channel 16, comparator 0 non-inverting input 2, and GPIO P0.12.
15 HALL_IN2/CAN_TX/ADC_CH17/CMP0_IP3/P0.13 bidirectional Hall-sensor phase C input; muxed with CAN TX, ADC channel 17, comparator 0 non-inverting input 3, and GPIO P0.13.
16 CMP0_OUT/MCPWM_BKIN1/SPI_CLK/TIM0_CH1/ADC_TRIG0/SIF/ADC_CH10/CMP0_IP4/P0.14 bidirectional Highly muxed pin: comparator 0 output, MCPWM brake-input 1, SPI clock, Timer0 channel 1, ADC trigger 0, single-wire/SIF interface, ADC channel 10, comparator 0 non-inverting input 4, GPIO P0.14.
17 MCPWM_CH0P/UART0_TX(RX)/SPI_DI(DO)/TIM0_CH0/ADC_TRIG1/CMP0_IN/P0.15 bidirectional MCPWM channel 0 high-side, UART0 TX/RX, SPI DI/DO, Timer0 channel 0, ADC trigger 1, comparator 0 inverting input, GPIO P0.15.
18 MCPWM_CH0N/UART0_TX(RX)/SPI_DI(DO)/P1.0 bidirectional MCPWM channel 0 low-side, UART0 TX/RX, SPI DI/DO, GPIO P1.0. Internal software-enabled 10 kΩ pull-up.
19 TIM3_CH1/ADC_CH5/P1.3 bidirectional Timer3 channel 1, ADC channel 5, GPIO P1.3. Internal software-enabled 10 kΩ pull-up.
20 OPA0_IP/P3.5 bidirectional Op-amp 0 non-inverting input, GPIO P3.5.
21 OPA0_IN/P3.7 bidirectional Op-amp 0 inverting input, GPIO P3.7.
22 ADC_CH11/OPAx_OUT/LDO15/P2.7 bidirectional ADC channel 11 / any-OPA output / internal 1.5 V LDO output tap / GPIO P2.7. Internal software-enabled 10 kΩ pull-up.
23 OPA1_IP/P3.0 bidirectional Op-amp 1 non-inverting input, GPIO P3.0.
24 OPA1_IN/P3.1 bidirectional Op-amp 1 inverting input, GPIO P3.1.
25 UART1_TX(RX)/TIM3_CH0/OSC_IN/P2.8 bidirectional UART1 TX/RX, Timer3 channel 0, 4 MHz crystal input, GPIO P2.8. Internal software-enabled 10 kΩ pull-up. When used with a crystal, add a ~15 pF cap to GND.
26 UART1_TX(RX)/TIM3_CH1/OSC_OUT/P3.9 bidirectional UART1 TX/RX, Timer3 channel 1, crystal output, GPIO P3.9. Internal software-enabled 10 kΩ pull-up. When used with a crystal, add a ~15 pF cap to GND.
27 LRC/MCPWM_CH0P/P1.4 bidirectional 32 kHz low-speed RC clock output, MCPWM channel 0 high-side, GPIO P1.4.
28 HRC/MCPWM_CH0N/P1.5 bidirectional 4 MHz high-speed RC clock output, MCPWM channel 0 low-side, GPIO P1.5.
29 MCPWM_CH1P/P1.6 bidirectional MCPWM channel 1 high-side output, GPIO P1.6.
30 MCPWM_CH1N/P1.7 bidirectional MCPWM channel 1 low-side output, GPIO P1.7.
31 MCPWM_CH2P/P1.8 bidirectional MCPWM channel 2 high-side output, GPIO P1.8.
32 MCPWM_CH2N/P1.9 bidirectional MCPWM channel 2 low-side output, GPIO P1.9.
33 ADC_CH13/MCPWM_CH3P/UART0_TX(RX)/SCL/TIM0_CH0/ADC_TRIG2/P1.10 bidirectional ADC channel 13, MCPWM channel 3 high-side, UART0 TX/RX, I2C SCL, Timer0 channel 0, ADC trigger 2, GPIO P1.10. Internal software-enabled 10 kΩ pull-up.
34 MCPWM_CH3N/UART0_TX(RX)/SDA/TIM0_CH1/ADC_TRIG3/SIF/P1.11 bidirectional MCPWM channel 3 low-side, UART0 TX/RX, I2C SDA, Timer0 channel 1, ADC trigger 3, SIF, GPIO P1.11. Internal software-enabled 10 kΩ pull-up.
35 OPA2_IP/P3.10 bidirectional Op-amp 2 non-inverting input, GPIO P3.10.
36 OPA2_IN/P3.11 bidirectional Op-amp 2 inverting input, GPIO P3.11.
37 SPI_DI(DO)/SCL/ADC_CH12/CMP0_IP0/P2.9 bidirectional SPI data-in or data-out (swappable), I2C SCL, ADC channel 12, comparator 0 non-inverting input 0, GPIO P2.9.
38 SPI_DI(DO)/SDA/P2.10 bidirectional SPI data-in or data-out (swappable), I2C SDA, GPIO P2.10. Internal software-enabled 10 kΩ pull-up.
39 OPA3_IN/P3.14 bidirectional Op-amp 3 inverting input, GPIO P3.14.
40 OPA3_IP/P3.15 bidirectional Op-amp 3 non-inverting input, GPIO P3.15.
41 SPI_CLK/ADC_CH14/CMP1_IP0/P2.1 bidirectional SPI clock, ADC channel 14, comparator 1 non-inverting input 0, GPIO P2.1. Internal software-enabled 10 kΩ pull-up.
42 CMP1_IN/P2.2 bidirectional Comparator 1 inverting input, GPIO P2.2.
43 CMP1_OUT/MCPWM_BKIN0/SPI_CS/REF/P2.3 bidirectional Comparator 1 output, MCPWM brake-input 0, SPI chip-select, voltage reference, GPIO P2.3.
44 HALL_IN0/CAN_RX/MCPWM_CH2P/UART1_TX(RX)/TIM1_CH0/ADC_TRIG3/CMP1_IP1/P2.4 bidirectional Hall phase A input, CAN RX, MCPWM channel 2 high-side, UART1 TX/RX, Timer1 channel 0, ADC trigger 3, comparator 1 non-inverting input 1, GPIO P2.4. Internal software-enabled 10 kΩ pull-up.
45 HALL_IN1/CAN_TX/MCPWM_CH2N/UART1_TX(RX)/TIM1_CH1/ADC_TRIG0/CMP1_IP2/P2.5 bidirectional Hall phase B input, CAN TX, MCPWM channel 2 low-side, UART1 TX/RX, Timer1 channel 1, ADC trigger 0, comparator 1 non-inverting input 2, GPIO P2.5. Internal software-enabled 10 kΩ pull-up.
46 HALL_IN2/MCPWM_CH3P/TIM3_CH0/ADC_TRIG1/CMP1_IP3/P2.6 bidirectional Hall phase C input, MCPWM channel 3 high-side, Timer3 channel 0, ADC trigger 1, comparator 1 non-inverting input 3, GPIO P2.6. Internal software-enabled 10 kΩ pull-up.
47 SWCLK input Serial-wire debug clock input. Fixed internal 10 kΩ pull-up.
48 SWDIO bidirectional Serial-wire debug data I/O. Fixed internal 10 kΩ pull-up.

Key specifications

Parameter Value
Manufacturer LINKOSEMI
Package TQFP-48(7x7)
Category MCU
Pins 48

Ordering variants

Same part, different packaging or reel option.

  • LKS32MC083C8T8
  • LKS32MC083C8T8(B)
  • LKS32MC081C8T8
  • LKS32MC081C8T8(B)
  • LKS32MC088C6T8
  • LKS32MC088C6T8(B)
  • LKS32MC080R8T8
  • LKS32MC080R8T8(B)
  • LKS32MC082K8Q8
  • LKS32MC082K8Q8(B)
  • LKS32MC084DF6Q8
  • LKS32AT085C8Q9
  • LKS32AT085C8Q9(B)
  • LKS32MC087M6S8
  • LKS32MC087AM6S8
  • LKS32MC087CM6S8
  • LKS32MC087DM6S8
  • LKS32MC087EM6S8

CAD (KiCad official)

  • Symbol: LKS32MC083C8T8
  • Footprint: Package_QFP:TQFP-48_7x7mm_P0.5mm
  • 3D model: TQFP-48(7x7) (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: LINKOSEMI datasheet (60 pp, sha256 184a8de0b09ebdcf, retrieved 2026-08-17, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF