LKS32MC057M6S8 from LINKOSEMI, in a SSOP-24-150mil. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	P0.15/P1.0	bidirectional	Shared pin combining P0.15 and P1.0. P0.15 alt-functions: EXTI, MCPWM_CH0P, UART0_TX(RX), SPI_DI(DO), SDA, TIM0_CH0, ADC_TRIG1, CMP0_IN. P1.0 alt-functions: WK, MCPWM_CH0N, UART0_TX(RX), SPI_DI(DO). Internal 10 kΩ software-controllable pull-up to AVDD.
2	P2.7	bidirectional	P2.7 with alt-functions ADC_CH11 / OPAx_OUT / LDO15 output. Internal 10 kΩ software-controllable pull-up.
3	P1.4	bidirectional	P1.4 with alt-functions LRC (64 kHz RC clock output) / MCPWM_CH0P (motor PWM channel 0 high-side).
4	P0.1/P1.5	bidirectional	Shared pin. P0.1: wake-up / EXTI / general-purpose IO. P1.5: HRC (4 MHz RC clock output) / MCPWM_CH0N (motor PWM channel 0 low-side).
5	P1.6	bidirectional	P1.6 / MCPWM_CH1P (motor PWM channel 1 high-side).
6	P1.7	bidirectional	P1.7 / MCPWM_CH1N (motor PWM channel 1 low-side).
7	P1.8	bidirectional	P1.8 / MCPWM_CH2P (motor PWM channel 2 high-side).
8	P1.9	bidirectional	P1.9 / MCPWM_CH2N (motor PWM channel 2 low-side).
9	P1.14	bidirectional	P1.14 / OPA0_IP (op-amp 0 non-inverting input).
10	P1.15/P2.9	bidirectional	Shared pin. P1.15: OPA0_IN (op-amp 0 inverting input). P2.9: SPI_DI(DO) / IIC SCL / ADC_CH9 / CMP0 non-inverting input channel 0 (CMP0_IP0). Internal 10 kΩ software-controllable pull-up. Note: internally ADC_CH9 samples OPA2 output when OPA remap is active - software must disable OPA remap to use ADC_CH9 directly.
11	P0.9	bidirectional	P0.9 / OPA1_IN (op-amp 1 inverting input).
12	P0.10	bidirectional	P0.10 / OPA1_IP (op-amp 1 non-inverting input).
13	P2.1/P2.3	bidirectional	Shared pin. P2.1: SPI_CLK / ADC_CH8 / CMP1 non-inverting input 0 (CMP1_IP0). P2.3: CMP1_OUT / voltage reference (REF) / MCPWM_BKIN0 (PWM brake) / SPI_CS / TIM0_CH1. Internal 10 kΩ software-controllable pull-up. Note: ADC_CH8 samples OPA2 output when OPA remap is active on 051 - check remap register.
14	P2.4	bidirectional	P2.4 with alt-functions CMP0_OUT / HALL_IN0 (Hall sensor A input) / MCPWM_CH2P (PWM ch2 high-side) / UART1_TX(RX) / TIM1_CH0 / ADC_TRIG3 / CMP1_IP1. Internal 10 kΩ software-controllable pull-up.
15	P2.5	bidirectional	P2.5 with alt-functions CMP1_OUT / HALL_IN1 (Hall sensor B input) / MCPWM_CH2N (PWM ch2 low-side) / UART1_TX(RX) / TIM1_CH1 / ADC_TRIG0 / CMP1_IP2. Internal 10 kΩ software-controllable pull-up.
16	P2.6/P2.13	bidirectional	Shared pin. P2.6: HALL_IN2 (Hall sensor C input) / MCPWM_CH3P / TIM3_CH0 / ADC_TRIG1 / CMP1_IP3. P2.13: SWCLK (SWD clock) / MCPWM_CH3N / UART0_TX(RX) / IIC SCL / TIM3_CH1. Internal 10 kΩ pull-up (fixed on the SWCLK pad).
17	P2.0	bidirectional	P2.0 with alt-functions SWDIO (SWD data) / UART0_TX(RX) / IIC SDA / TIM2_CH1. Internal fixed 10 kΩ pull-up to AVDD.
18	P0.0/P0.2	bidirectional	Shared pin. P0.0: WK / EXTI / ADC_CH4 / DAC_OUT (12-bit DAC output). P0.2: RSTN (default function, external reset input) / SPI_DI(DO). Internal 100 kΩ fixed pull-up on RSTN; recommend a 10-100 nF decoupling cap from RSTN to ground (with an optional 10-20 kΩ external pull-up to AVDD, using 100 nF).
19	AVSS	power_in	System analog/digital ground reference.
20	AVDD	power_in	Main chip supply input, 2.2-5.5 V. Recommend ≥1 μF decoupling capacitor placed close to the AVDD pin.
21	P2.11/P2.12/P0.11	bidirectional	Shared pin combining three die-pads. P2.11: EXTI / MCPWM_CH1P / TIM2_CH0. P2.12: SPI_CS / MCPWM_CH1N / TIM2_CH1 / ADC_TRIG2. P0.11: EXTI / HALL_IN0 / TIM3_CH0 / ADC_CH6 / CMP0_IP1 / IIC SCL. Internal 10 kΩ software-controllable pull-up.
22	P0.12	bidirectional	P0.12 with alt-functions EXTI / HALL_IN1 (Hall sensor B input) / TIM3_CH1 / ADC_CH2 / CMP0_IP2 / IIC SDA. Internal 10 kΩ software-controllable pull-up.
23	P0.13	bidirectional	P0.13 with alt-functions EXTI / HALL_IN2 (Hall sensor C input) / ADC_CH3 / CMP0_IP3.
24	P0.14	bidirectional	P0.14 with alt-functions EXTI / CMP0_OUT / MCPWM_BKIN1 (PWM brake) / UART0_TX(RX) / SPI_CLK / IIC SCL / TIM0_CH1 / ADC_TRIG0 / ADC_CH10 / CMP0_IP4. Internal 10 kΩ software-controllable pull-up.

Key specifications

Parameter	Value
Manufacturer	LINKOSEMI
Package	SSOP-24-150mil
Category	PMIC
Pins	24

Ordering variants

Same part, different packaging or reel option.

LKS32MC057M6S8
LKS32MC051C6T8
LKS32MC052K6Q8

CAD (KiCad official)

Symbol: LKS32MC057M6S8
Footprint: Package_SO:SSOP-24_5.3x8.2mm_P0.65mm
3D model: SSOP-24-150mil (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File	Size	Use it when
`lks32mc057m6s8.step`	315 KB	You want the bare part, or you mark your own boards.
`lks32mc057m6s8-etched.step`	3.9 MB	You want the part with `LKS32MC057M6S8` already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 944 faces against 387 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: LINKOSEMI datasheet (43 pp, sha256 3df93253e82ab4d3, retrieved 2026-08-17, tier: lcsc)
Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF