LF411CDR from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	BAL1	input	Offset null / balance pin 1. Connect a potentiometer (typ. 10 kΩ) between BAL1 and BAL2 with the wiper tied to VCC- to trim input offset voltage to zero.
2	IN-	input	Inverting input of the op-amp. High-impedance JFET input (~10^12 Ω), input bias current 50 pA typ.
3	IN+	input	Non-inverting input of the op-amp. High-impedance JFET input (~10^12 Ω), input bias current 50 pA typ.
4	VCC-	power_in	Negative supply rail. Recommended operating range -3.5 V to -18 V; absolute maximum -18 V. In single-supply operation connect to GND.
5	BAL2	input	Offset null / balance pin 2. Used with BAL1 and a trim potentiometer (wiper to VCC-) to null input offset voltage.
6	OUT	output	Op-amp output. Peak output-voltage swing ±13.5 V typ at RL=10 kΩ with ±15 V supplies; short-circuit protected (unlimited duration).
7	VCC+	power_in	Positive supply rail. Recommended operating range 3.5 V to 18 V; absolute maximum 18 V.
8	NC	unconnected	No internal connection. Leave floating or tie to any convenient potential.

Key specifications

Parameter	Value
Manufacturer	Texas Instruments
Package	SOIC-8
Category	Op-amp/Cmp
Pins	8

Ordering variants

Same part, different packaging or reel option.

LF411CDR
LF411CDG4
LF411CDRG4
LF411ID
LF411CP
LF411CPE4
LF411IP

CAD (KiCad official)

Symbol: LF411CDR
Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
3D model: SOIC-8 (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Texas Instruments datasheet (11 pp, sha256 1e51951a18976c2b, retrieved 2026-08-17, tier: manufacturer)
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF