LDS3985M18R from STMicroelectronics, in a SOT-23-5L. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	VI	power_in	LDO input voltage. Operating range 2.5 V to 6 V (absolute max -0.3 V to 6 V; non-repetitive spike up to 6.5 V for 200 ms). Bypass with a low ESR ceramic capacitor (>= 1 uF).
2	GND	power_in	Common ground reference for the regulator and its external input/output/bypass capacitors.
3	VINH	input	Inhibit/enable input. ON mode when VINH >= 1.2 V (typ. logic-high threshold 1.4 V), OFF mode when VINH <= 0.4 V. Inhibit input current +/-1 nA max. Do not leave floating; it is not internally pulled up or down.
4	Bypass	passive	Reference-voltage bypass pin. Connect an external capacitor (typ. 33 nF) to GND to minimize output noise (30 uVrms over 10 Hz-100 kHz with Cbyp = 33 nF).
5	VO	power_out	LDO regulated output, fixed 1.8 V for the M18R option. Guaranteed load current up to 300 mA. Requires an output capacitor Co = 2.2 uF to 22 uF with ESR 5 mOhm to 5 Ohm for stability.

Key specifications

Parameter	Value
Manufacturer	STMicroelectronics
Package	SOT-23-5L
Category	PMIC
Pins	5

Ordering variants

Same part, different packaging or reel option.

LDS3985M18RM15R
LDS3985M18R
LDS3985M18RM25R
LDS3985M18RM28R
LDS3985M18RM30R
LDS3985M18RM33R
LDS3985M18RM50R
LDS3985M18RPU15R
LDS3985M18RPU28R
LDS3985M18RPU33R
LDS3985M18RPU18RY
LDS3985M18RPU33RY

CAD (KiCad official)

Symbol: LDS3985M18R
Footprint: Package_TO_SOT_SMD:SOT-23-5
3D model: SOT-23-5L (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: STMicroelectronics datasheet (21 pp, sha256 72544d5f7fa35736, retrieved 2026-08-17, tier: lcsc)
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF