LD1117AS18TR
Public Unreviewedby Ray
STMicroelectronics Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-223-3. Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
Open in new tab ↗
Symbol & Footprint
Schematic Symbol
Open full view ↗PCB Footprint
Open full view ↗Datasheet
Open in new tab ↗Contents
README
markdownLD1117AS18TR
STMicroelectronics · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-223-3
LD1117AS18TR from STMicroelectronics, in a SOT-223-3. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | ADJ/GND | power_in | Ground reference pin for the fixed-output versions (LD1117AS18 uses this pin as GND). On the adjustable variant this same pin is the ADJ feedback input (VREF = 1.25 V to the external divider). Connect to system ground for the LD1117AS18TR (1.8 V fixed). |
| 2 | VOUT | power_out | Regulated 1.8 V output. Sources up to 1 A (1.2 A typical current limit). Requires a minimum 10 µF output capacitor to GND for loop stability. The SOT-223 tab is internally connected to this pin. |
| 3 | VIN | power_in | Unregulated DC input supply. Operating input voltage up to 10 V (absolute max 15 V). Dropout ≤1.15 V typ at 1 A, so VIN must be ≥ VOUT + VDROPOUT. A 100 nF input capacitor is recommended close to the pin. |
| TAB | VOUT | power_out | SOT-223 thermal tab, internally shorted to the VOUT pin (pin 2). Provides the primary heat-sinking path (RthJC = 15 °C/W, RthJA = 110 °C/W). Solder to a copper pour tied to VOUT to improve thermal performance. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | SOT-223-3 |
| Category | PMIC |
| Pins | 4 |
Ordering variants
Same part, different packaging or reel option.
LD1117AS18TRLD1117ADT18TRLD1117AV33
CAD (KiCad official)
- Symbol:
LD1117AS18TR - Footprint:
Package_TO_SOT_SMD:SOT-223-3_TabPin2 - 3D model: SOT-223-3 (KiCad packages3D, STEP)
3D model downloads
Two STEP files. Same geometry, different body top:
| File | Size | Use it when |
|---|---|---|
ld1117as18tr.step |
64 KB | You want the bare part, or you mark your own boards. |
ld1117as18tr-etched.step |
1.8 MB | You want the part with LD1117AS18TR already on it. |
The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 454 faces against 75 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (24 pp, sha256
5cf3aab5b1478366, retrieved 2026-08-17, tier: lcsc) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).