ISO3082DWR from Texas Instruments, in a SOIC-16-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	VCC1	power_in	Logic-side supply. 3.15 V to 5.5 V (5 V nominal for 5-V operation, 3.15-3.6 V for 3.3-V operation). Decouple with a low-ESR bypass capacitor to GND1.
2	GND1	power_in	Logic-side ground reference. Return for VCC1 and the D/DE/RE/R logic signals. Galvanically isolated from GND2.
3	R	output	Receiver output on the logic side. Logic-level output of the differential receiver comparing bus lines A and B; VOH ≈ VCC1 - 0.4 V typ, VOL ≈ 0.15 V typ. High-impedance when RE is high.
4	RE	input	Receiver enable, active low. Drive low to enable the receiver output R; drive high to place R in high-impedance. 3.3-V/5-V logic-level input; 5-V tolerant.
5	DE	input	Driver enable, active high. Drive high to enable the differential bus driver onto A/B; drive low to place bus outputs in high-impedance. 3.3-V/5-V logic-level input.
6	D	input	Driver input on the logic side. Logic-level input that determines the polarity of the differential driver on A/B when DE is asserted. VIH ≥ 2 V, VIL ≤ 0.8 V.
7	GND1	power_in	Logic-side ground (tied to pin 2). Multiple GND1 pins improve return-path integrity for the isolated logic side.
8	GND1	power_in	Logic-side ground (tied to pin 2). Multiple GND1 pins improve return-path integrity for the isolated logic side.
9	GND2	power_in	Bus-side ground. Return for VCC2 and the RS-485 bus terminals A/B. Galvanically isolated from GND1.
10	GND2	power_in	Bus-side ground (tied to pin 9). Multiple GND2 pins improve return-path integrity for the isolated bus side.
11	NC	unconnected	No internal connection. On the ISO3082/ISO3088 half-duplex variants this pin is unused (corresponds to the Y driver output on the full-duplex ISO3080/86).
12	A	bidirectional	Non-inverting RS-485 bus I/O. Driver output when DE is high, receiver non-inverting input otherwise. Tolerates -7 V to +12 V bus common-mode; ±12 kV HBM ESD to GND2.
13	B	bidirectional	Inverting RS-485 bus I/O. Driver output when DE is high, receiver inverting input otherwise. Tolerates -7 V to +12 V bus common-mode; ±12 kV HBM ESD to GND2.
14	NC	unconnected	No internal connection. On the ISO3082/ISO3088 half-duplex variants this pin is unused (corresponds to the Z driver output on the full-duplex ISO3080/86).
15	GND2	power_in	Bus-side ground (tied to pin 9). Multiple GND2 pins improve return-path integrity for the isolated bus side.
16	VCC2	power_in	Bus-side supply. 4.5 V to 5.5 V (5 V nominal). Powers the isolated bus-side transceiver; decouple with a low-ESR bypass capacitor to GND2.

Key specifications

Parameter	Value
Manufacturer	Texas Instruments
Package	SOIC-16-300mil
Category	Interface
Pins	16

Ordering variants

Same part, different packaging or reel option.

ISO3082DWR

CAD (KiCad official)

Symbol: ISO3082DWR
Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
3D model: SOIC-16-300mil (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File	Size	Use it when
`iso3082dwr.step`	217 KB	You want the bare part, or you mark your own boards.
`iso3082dwr-etched.step`	2.9 MB	You want the part with `ISO3082DWR` already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 698 faces against 267 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Texas Instruments datasheet (20 pp, sha256 5409d7f5b945e3a3, retrieved 2026-08-17, tier: manufacturer)
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF