ISO1410BDWR from Texas Instruments, in a SOIC-16-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	VCC1	power_in	Logic-side power supply. 1.71-1.89 V for 1.8-V operation, or 2.25-5.5 V for 2.5/3.3/5-V operation. Bypass to GND1 with a local decoupling capacitor.
2	GND1	power_in	Ground connection for VCC1 (logic side). Must be tied to the same ground as pin 8 on the PCB.
3	R	output	Receiver output on the logic side. CMOS output that drives the MCU/FPGA RX pin at VCC1 levels.
4	RE	input	Receiver enable (active low). Drive low to enable the receiver output on R; drive high or leave open to disable/tri-state R. Referenced to VCC1/GND1 logic levels.
5	DE	input	Driver enable (active high). Drive high to enable the RS-485 bus driver outputs (A/B); low or open disables the driver, tri-stating the bus pins.
6	D	input	Driver input on the logic side. CMOS input from the MCU/FPGA TX pin; sampled at VCC1 logic levels when DE is asserted.
7	NC	unconnected	No internal connection. Device functionality is not affected if this pin is connected to supply or ground on the PCB.
8	GND1	power_in	Ground connection for VCC1 (logic side). Must be tied together with pin 2 to GND1 on the PCB.
9	GND2	power_in	Ground connection for VCC2 (bus side, isolated). Must be tied together with pin 15 to GND2 on the PCB.
10	NC	unconnected	No internal connection. Device functionality is not affected if this pin is connected to supply or ground on the PCB.
11	NC	unconnected	No internal connection. Device functionality is not affected if this pin is connected to supply or ground on the PCB.
12	A	bidirectional	RS-485 bus-side non-inverting I/O. Driver non-inverting output when DE is high; receiver non-inverting input when RE is low. Withstands −7 V to +12 V common-mode; ±18 V absolute max w.r.t. GND2.
13	B	bidirectional	RS-485 bus-side inverting I/O. Driver inverting output when DE is high; receiver inverting input when RE is low. Same common-mode and absolute-max range as A.
14	NC	unconnected	No internal connection. Device functionality is not affected if this pin is connected to supply or ground on the PCB.
15	GND2	power_in	Ground connection for VCC2 (bus side, isolated). Must be tied together with pin 9 to GND2 on the PCB.
16	VCC2	power_in	Transceiver-side (bus-side) power supply, 3.0-5.5 V. Isolated from VCC1 across the reinforced isolation barrier. Bypass to GND2 with a local decoupling capacitor.

Key specifications

Parameter	Value
Manufacturer	Texas Instruments
Package	SOIC-16-300mil
Category	Comm/UART
Pins	16

Ordering variants

Same part, different packaging or reel option.

ISO1410BDWR

CAD (KiCad official)

Symbol: ISO1410BDWR
Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
3D model: SOIC-16-300mil (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File	Size	Use it when
`iso1410bdwr.step`	217 KB	You want the bare part, or you mark your own boards.
`iso1410bdwr-etched.step`	2.6 MB	You want the part with `ISO1410BDWR` already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 660 faces against 267 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Texas Instruments datasheet (49 pp, sha256 36c9ab5123938800, retrieved 2026-08-17, tier: manufacturer)
Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF