component
IP2161
Public Unreviewedby Ray
INJOINIC Battery Management, SOT-23-6. Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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markdownIP2161
INJOINIC · Battery Management · SOT-23-6
IP2161 from INJOINIC, in a SOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | DP | bidirectional | USB D+ data line. Connects to the USB port DP pin; the IC monitors DP/DM voltage to detect the attached device and negotiate the fast-charge protocol. Absolute max input voltage -0.3 to 11V. |
| 2 | GND | power_in | Ground reference pin. |
| 3 | FB | output | Feedback control pin. Connects to the FB pin of an external upstream power supply IC and sources or sinks current (minimum 2uA/step) into the FB resistor divider to precisely adjust VOUT. Typical: SOURCE 40uA for 9V output, SOURCE 70uA for 12V output, no current for default 5V. R1 (FB to VOUT) should be a 1% 100kΩ resistor. |
| 4 | SEL | input | Maximum request voltage select input. Tri-state: pulled high to V_SELH (3-5.5V) selects 12V max; left floating selects 9V max; tied to GND disables all HVDCP protocols and outputs 5V only. Default V_SELO = 1.5V. |
| 5 | VBUS | power_in | Supply / VBUS sense input pin. Add a 1uF decoupling capacitor to GND. The upstream power supply's VOUT should be connected to VBUS through a series 2kΩ resistor. Operating range 3V-5.5V, absolute max 7V. |
| 6 | DM | bidirectional | USB D- data line. Connects to the USB port DM pin; used together with DP to detect device type and drive the fast-charge handshake. Absolute max input voltage -0.3 to 11V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | INJOINIC |
| Package | SOT-23-6 |
| Category | PMIC |
| Pins | 6 |
CAD (KiCad official)
- Symbol:
IP2161 - Footprint:
Package_TO_SOT_SMD:SOT-23-6 - 3D model: SOT-23-6 (KiCad packages3D, STEP)
3D model downloads
Two STEP files. Same geometry, different body top:
| File | Size | Use it when |
|---|---|---|
ip2161.step |
97 KB | You want the bare part, or you mark your own boards. |
ip2161-etched.step |
1.2 MB | You want the part with IP2161 already on it. |
The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 315 faces against 117 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: INJOINIC datasheet (8 pp, sha256
eb65f77192ee8052, retrieved 2026-08-17, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).