IMP811S-TD from TDSEMIC, in a SOT-143. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	GND	power_in	Ground / negative supply return for the device.
2	RESET	output	Active-low reset output. Driven low when VCC is below Vth (3.08 V typ.) or when MR is low; released high after the Trp delay (500 ms typ.) once VCC recovers and MR is high. VOL ≤ 0.5 V at ISINK = 3.2 mA; VOH ≥ 0.8·VCC at ISOURCE = 500 µA.
3	MR	input	Manual reset / enable control input, active-low. Driving MR low forces RESET low; a low-to-high transition on MR (with VCC ≥ Vth) starts the Trp reset delay. Logic thresholds: VIH ≥ 0.7·VCC, VIL ≤ 0.2·VCC; minimum pulse width tMR = 10 µs.
4	VCC	power_in	Positive supply input, 1.0 V to 6.0 V operating range (absolute max 6.5 V). This is also the monitored voltage; RESET asserts when VCC falls below Vth = 3.08 V (typ., ±2.5%). Quiescent current ~2 µA typ. (ICCH max 5 µA at VMR=VCC).

Key specifications

Parameter	Value
Manufacturer	TDSEMIC
Package	SOT-143
Category	PMIC
Pins	4

Ordering variants

Same part, different packaging or reel option.

IMP811S-TD

CAD (KiCad official)

Symbol: IMP811S-TD
Footprint: Package_TO_SOT_SMD:SOT-143
3D model: SOT-143 (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: TDSEMIC datasheet (3 pp, sha256 f47d2383d09cfbcd, retrieved 2026-08-17, tier: lcsc)
Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF