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HT7530S-1

UMW · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-5

HT7530S-1 from UMW, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 GND power_in Ground / common return for the regulator. Tie directly to the system ground plane; the internal reference and error amplifier are referenced to this pin.
2 VIN power_in Unregulated input supply, up to 30 V absolute maximum. Bypass with a ~10 µF capacitor to GND close to the pin (see application circuit). Must exceed VOUT by at least the dropout voltage (~0.1 V typ at 1 mA).
3 VOUT power_out Regulated output, fixed 3.0 V (±3%) for the HT7530S-1 variant. Sources up to 100 mA (60 mA min guaranteed). Requires a ~10 µF output capacitor to GND for stability.

Key specifications

Parameter Value
Manufacturer UMW
Package SOT-23-5
Category PMIC
Pins 3

Ordering variants

Same part, different packaging or reel option.

  • HT7530S-1S

CAD (KiCad official)

  • Symbol: HT7530S-1
  • Footprint: Package_TO_SOT_SMD:SOT-23-5
  • 3D model: SOT-23-5 (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: UMW datasheet (15 pp, sha256 f3b47345b626e60d, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF