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HT7350

GUOXIN JIAPIN SEMICONDUCTOR · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-3L

HT7350 from GUOXIN JIAPIN SEMICONDUCTOR, in a SOT-23-3L. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 GND power_in Chip ground reference (芯片接地端). Common return for input and output. Connect to system ground with a low-impedance path close to the input/output bypass capacitor return.
2 VIN power_in Unregulated input supply (启动输入端). Operating range for HT7350 is 6 V ≤ VIN ≤ 12 V for full regulation; absolute maximum input voltage is 15 V. Bypass with a 10 µF capacitor (C1) to GND close to the pin.
3 VOUT power_out Regulated output (芯片输出端). Nominal 5.0 V ±3% (4.85 V min / 5.15 V max) with dropout ~60 mV at 40 mA. Rated output current 250 mA (VIN=6 V, VOUT≥4.5 V), typical operating current 40 mA. Requires a 10 µF output capacitor (C2) to GND for stability.

Key specifications

Parameter Value
Manufacturer GUOXIN JIAPIN SEMICONDUCTOR
Package SOT-23-3L
Category PMIC
Pins 3

CAD (KiCad official)

  • Symbol: HT7350
  • Footprint: Package_TO_SOT_SMD:SOT-23-3
  • 3D model: SOT-23-3L (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: GUOXIN JIAPIN SEMICONDUCTOR datasheet (7 pp, sha256 b3db975a36212cc2, retrieved 2026-08-17, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF