component
HT7038
Public Unreviewedby Ray
HiTrend Tech Shanghai Energy Metering, LQFP-32(7x7). Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
Open in new tab ↗
Symbol & Footprint
Schematic Symbol
Open full view ↗PCB Footprint
Open full view ↗Datasheet
Open in new tab ↗README
markdownHT7038
HiTrend Tech Shanghai · Energy Metering · LQFP-32(7x7)
HT7038 from HiTrend Tech Shanghai, in a LQFP-32(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | V1P | input | Channel 1 (current channel) positive analog input. Fully differential, normal max signal ±0.7Vp. Channel 1 has an internal PGA; ESD protection integrated. |
| 2 | V1N | input | Channel 1 (current channel) negative analog input. Fully differential with V1P, ±0.7Vp full-scale, internal PGA and ESD protection. |
| 3 | REFCAP | output | Internal 1.2V voltage reference output; may be driven by an external reference. Decouple with 10µF in parallel with 0.1µF ceramic to AGND. |
| 4 | V3P | input | Channel 3 (current channel) positive analog input. Fully differential, ±0.7Vp full-scale, integrated PGA and ESD protection. |
| 5 | V3N | input | Channel 3 (current channel) negative analog input; pairs with V3P as differential input. |
| 6 | AGND | power_in | Analog ground reference for the ADC and voltage reference. Tie to the analog ground plane on the PCB. |
| 7 | V5P | input | Channel 5 (current channel) positive analog input. Fully differential, ±0.7Vp full-scale, PGA and ESD protection. |
| 8 | V5N | input | Channel 5 (current channel) negative analog input; pairs with V5P differentially. |
| 9 | AGND | power_in | Analog ground reference (shared with pins 6/13). |
| 10 | AVCC | power_in | Analog 3.3V ±10% supply. Decouple with 10µF in parallel with 0.1µF ceramic close to the pin. |
| 11 | V2P | input | Channel 2 (voltage channel) positive analog input. Max input ~0.7Vp differential; ESD protection on both pins. |
| 12 | V2N | input | Channel 2 (voltage channel) negative analog input. |
| 13 | AGND | power_in | Analog ground reference (shared with pins 6/9). |
| 14 | V4P | input | Channel 4 (voltage channel) positive analog input. Differential ±0.7Vp, ESD protected. |
| 15 | V4N | input | Channel 4 (voltage channel) negative analog input. |
| 16 | AVCC | power_in | Analog 3.3V ±10% supply (shared with pin 10). Decouple with 10µF |
| 17 | V6P | input | Channel 6 (voltage channel) positive analog input. Differential ±0.7Vp, ESD protected. |
| 18 | V6N | input | Channel 6 (voltage channel) negative analog input. |
| 19 | GND | power_in | Digital ground reference. Tie to the digital ground plane. |
| 20 | CF1 | output | Frequency calibration output (high-level pulse) used for active-power calibration; can also drive an active-energy pulse counter. |
| 21 | CF2 | output | Frequency calibration output (high-level pulse) used for reactive-power calibration; can also drive a reactive-energy pulse counter. |
| 22 | SLEEP | input | Sleep-mode control pin, active high. Drive high to enter sleep (≈1µA). Drive low to resume normal operation. |
| 23 | GND | power_in | Digital ground reference (shared with pin 19). |
| 24 | VCC | power_in | Digital supply, 3.3V ±5%. Decouple with 10µF in parallel with 100nF ceramic close to the pin. |
| 25 | CS | input | SPI chip select from host MCU, active low. When CS is high, DOUT is high-impedance. Schmitt-trigger input with internally programmable 300kΩ pull-up (or floating). |
| 26 | SCLK | input | SPI serial clock from the host MCU. Schmitt-trigger input for opto-isolator compatibility; internally programmable 300kΩ pull-up or floating. |
| 27 | DIN | input | SPI serial data input (MOSI) from host MCU. Data is latched on the SCLK falling edge. Schmitt-trigger input with programmable 300kΩ pull-up or floating. |
| 28 | DOUT | tri_state | SPI serial data output (MISO). Data changes on SCLK rising edge, valid on falling edge. High-Z when CS is high. |
| 29 | VDD | power_out | Internal 1.8V digital core LDO output. Decouple externally with 10µF in parallel with 100nF ceramic; do not use as an external supply rail. |
| 30 | OSCI | input | Crystal oscillator input or external clock input (recommended 5.5296 MHz). Internal 10MΩ feedback resistor for crystal biasing. |
| 31 | OSCO | output | Crystal oscillator output. Connects to the second terminal of the 5.5296 MHz crystal. |
| 32 | RESET | input | External reset input, active low. Schmitt-trigger with internal 47kΩ pull-up. A low pulse >20µs triggers a hardware reset. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | HiTrend Tech Shanghai |
| Package | LQFP-32(7x7) |
| Category | Data Acquisition |
| Pins | 32 |
CAD (KiCad official)
- Symbol:
HT7038 - Footprint:
Package_QFP:LQFP-32_7x7mm_P0.8mm - 3D model: LQFP-32(7x7) (KiCad packages3D, STEP)
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: HiTrend Tech Shanghai datasheet (53 pp, sha256
514b488db76cb685, retrieved 2026-08-17, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).