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HT6050ARZ

HTCSEMI · DC-DC Converters · ESOP-8

HT6050ARZ from HTCSEMI, in a ESOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 SW power_out Internal power switch node. External connection to the power inductor and to the CBST bootstrap capacitor. Absolute max -0.3V to 65V referenced to GND.
2 BST power_in Bootstrap supply for the high-side MOSFET gate driver. Connect a 100nF (recommended 0.47uF X7R/X5R, ≥16V) ceramic capacitor between BST and SW. Absolute max BST-to-SW: -0.3V to +5.5V.
3 VCC power_out Internal LDO output that supplies the control circuits and gate drivers, typically 5.0V. Connect a 1uF-4.7uF ceramic decoupling capacitor from VCC to PGND close to the pin. Absolute max -0.3V to 5.5V.
4 FREQ input Switching frequency programming pin. Connect a resistor from FREQ to GND to set Fsw over 200kHz-2MHz; RT(kΩ) = 81053/Fs(kHz) - 21. Absolute max -0.3V to 5.5V.
5 FB input Output voltage feedback input. Connect a resistor divider from VOUT to GND with the midpoint tied here to program VOUT; internal reference VFB = 1.0V (typ). Absolute max -0.3V to 5.5V.
6 PG output Open-drain Power Good indicator. Pulls low when the output is out of regulation; releases high (via external pull-up ≤36V, typically 10kΩ-100kΩ to VCC) when FB is within about ±15% of the internal reference.
7 EN input Regulator output enable. Drive high to enable; below VEN_L (0.5V) the device enters shutdown (typ 2uA input current, ILKG_EN <1uA at EN<60V). A resistor divider from VIN to GND can set an adjustable VIN UVLO via the precise VEN_UV threshold (1.19-1.21V).
8 VIN power_in Regulator power input, 4V-60V operating range (absolute max 65V). Bypass to PGND with a 2.2uF or larger ceramic capacitor placed as close to the pin as possible.
EP GND power_in Exposed thermal pad. Must be connected to PGND on the PCB for both electrical ground return and heat dissipation.

Key specifications

Parameter Value
Manufacturer HTCSEMI
Package ESOP-8
Category PMIC
Pins 9

Ordering variants

Same part, different packaging or reel option.

  • HT6050ARZ
  • HT6050ARZAREZ

CAD (KiCad official)

  • Symbol: HT6050ARZ
  • Footprint: Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm
  • 3D model: ESOP-8 (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: HTCSEMI datasheet (25 pp, sha256 f41ca9fdba9030d8, retrieved 2026-08-17, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF