HG24LC64M from HGSEMI, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	A0	input	Device address input bit 0. Hard-wired to VCC or GND to set one of the three user-selectable device address bits (up to eight devices per two-wire bus).
2	A1	input	Device address input bit 1. Hard-wired to VCC or GND to select the device on the two-wire bus.
3	A2	input	Device address input bit 2. Hard-wired to VCC or GND to select the device on the two-wire bus.
4	GND	power_in	Ground reference for the device.
5	SDA	bidirectional	Serial data line for the two-wire (I2C) interface. Open-drain output; requires an external pull-up resistor. Bi-directional for reads and writes.
6	SCL	input	Serial clock input for the two-wire (I2C) interface. Data is latched into the EEPROM on the positive edge and clocked out on the negative edge. Supports 1 MHz at 5V and 400 kHz at 1.8/2.5/2.7V.
7	WP	input	Write Protect. Tie to GND for normal read/write operation. Tie to VCC to hardware-write-protect the full 64K array.
8	VCC	power_in	Positive supply voltage, 1.8V to 5.5V operating range (absolute max 6.5V).

Key specifications

Parameter	Value
Manufacturer	HGSEMI
Package	SOP-8
Category	Memory
Pins	8

Ordering variants

Same part, different packaging or reel option.

HG24LC64N
HG24LC64M/TR
HG24LC64MM/TR

CAD (KiCad official)

Symbol: HG24LC64M
Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
3D model: SOP-8 (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: HGSEMI datasheet (14 pp, sha256 4178d79f29490d4d, retrieved 2026-08-17, tier: lcsc)
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF