component
HEF40106BT
Public Unreviewedby Ray
Nexperia Inverters, SOIC-14. Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
Open in new tab ↗
Symbol & Footprint
Schematic Symbol
Open full view ↗PCB Footprint
Open full view ↗Datasheet
Open in new tab ↗README
markdownHEF40106BT
Nexperia · Inverters · SOIC-14
HEF40106BT from Nexperia, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1A | input | Schmitt-trigger input of inverter 1. Includes input clamp diodes to VDD and VSS; VI range 0 V to VDD; typical positive-going threshold VT+ = 3.0 V at VDD = 5 V, negative-going threshold VT- = 2.2 V. |
| 2 | 1Y | output | Inverted output of inverter 1. CMOS push-pull output; IOH ~ -1.4 mA at VO = 2.5 V, VDD = 5 V; IOL ~ 0.5 mA at VO = 0.4 V, VDD = 5 V. |
| 3 | 2A | input | Schmitt-trigger input of inverter 2. Includes input clamp diodes to VDD and VSS. |
| 4 | 2Y | output | Inverted output of inverter 2. CMOS push-pull output. |
| 5 | 3A | input | Schmitt-trigger input of inverter 3. Includes input clamp diodes to VDD and VSS. |
| 6 | 3Y | output | Inverted output of inverter 3. CMOS push-pull output. |
| 7 | VSS | power_in | Ground (0 V) reference. Negative supply rail; all voltages referenced to VSS. |
| 8 | 4Y | output | Inverted output of inverter 4. CMOS push-pull output. |
| 9 | 4A | input | Schmitt-trigger input of inverter 4. Includes input clamp diodes to VDD and VSS. |
| 10 | 5Y | output | Inverted output of inverter 5. CMOS push-pull output. |
| 11 | 5A | input | Schmitt-trigger input of inverter 5. Includes input clamp diodes to VDD and VSS. |
| 12 | 6Y | output | Inverted output of inverter 6. CMOS push-pull output. |
| 13 | 6A | input | Schmitt-trigger input of inverter 6. Includes input clamp diodes to VDD and VSS. |
| 14 | VDD | power_in | Positive supply voltage. Operating range 3.0 V to 15.0 V; absolute maximum 18 V. Supply current IDD typ 0.25 uA at VDD = 5 V (static). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Nexperia |
| Package | SOIC-14 |
| Category | Logic |
| Pins | 14 |
Ordering variants
Same part, different packaging or reel option.
HEF40106BTHEF40106BTT
CAD (KiCad official)
- Symbol:
HEF40106BT - Footprint:
Package_SO:SOIC-14_3.9x8.7mm_P1.27mm - 3D model: SOIC-14 (KiCad packages3D, STEP)
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Nexperia datasheet (14 pp, sha256
385d3a3085506d62, retrieved 2026-08-17, tier: manufacturer) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).