component
HEF4001BT
Public Unreviewedby Ray
Nexperia Gates, SOIC-14. Datasheet-verified pinout, KiCad symbol/footprint/3D.
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markdownHEF4001BT
Nexperia · Gates · SOIC-14
HEF4001BT from Nexperia, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1A | input | Gate 1, input A. CMOS logic input to the first 2-input NOR gate. Includes clamp diodes to VDD and VSS, allowing use of series current-limiting resistors to interface signals above VDD. |
| 2 | 1B | input | Gate 1, input B. CMOS logic input to the first 2-input NOR gate. Includes clamp diodes to VDD and VSS. |
| 3 | 1Y | output | Gate 1 NOR output. Y = NOR(A, B). Standardized symmetrical CMOS push-pull output. Typical drive: IOL ≈ 0.5 mA at VOL = 0.4 V (VDD = 5 V). |
| 4 | 2Y | output | Gate 2 NOR output. Y = NOR(A, B). Standardized symmetrical CMOS push-pull output. |
| 5 | 2A | input | Gate 2, input A. CMOS logic input to the second 2-input NOR gate. Includes clamp diodes to VDD and VSS. |
| 6 | 2B | input | Gate 2, input B. CMOS logic input to the second 2-input NOR gate. Includes clamp diodes to VDD and VSS. |
| 7 | VSS | power_in | Ground reference (0 V). Negative supply rail for all four NOR gates. |
| 8 | 3A | input | Gate 3, input A. CMOS logic input to the third 2-input NOR gate. Includes clamp diodes to VDD and VSS. |
| 9 | 3B | input | Gate 3, input B. CMOS logic input to the third 2-input NOR gate. Includes clamp diodes to VDD and VSS. |
| 10 | 3Y | output | Gate 3 NOR output. Y = NOR(A, B). Standardized symmetrical CMOS push-pull output. |
| 11 | 4Y | output | Gate 4 NOR output. Y = NOR(A, B). Standardized symmetrical CMOS push-pull output. |
| 12 | 4A | input | Gate 4, input A. CMOS logic input to the fourth 2-input NOR gate. Includes clamp diodes to VDD and VSS. |
| 13 | 4B | input | Gate 4, input B. CMOS logic input to the fourth 2-input NOR gate. Includes clamp diodes to VDD and VSS. |
| 14 | VDD | power_in | Positive supply voltage. Operating range 3.0 V to 15.0 V; absolute max 18 V. Supplies all four NOR gates. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Nexperia |
| Package | SOIC-14 |
| Category | Logic |
| Pins | 14 |
Ordering variants
Same part, different packaging or reel option.
HEF4001BTT
CAD (KiCad official)
- Symbol:
HEF4001BT - Footprint:
Package_SO:SOIC-14_3.9x8.7mm_P1.27mm - 3D model: SOIC-14 (KiCad packages3D, STEP)
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Nexperia datasheet (9 pp, sha256
231cccb55ff45222, retrieved 2026-08-17, tier: manufacturer) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).