HC32L176KATA-LQFP64 from XHSC, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	VCAP	passive	Internal 1.5 V LDO decoupling capacitor node. Connect an external ceramic cap (typ. 1 uF) to VSS; no external load allowed.
2	PC13	bidirectional	General-purpose I/O, muxed with RTC_1HZ output, TIM3_CH1B, and LVD0 analog input.
3	PC14/XTLI	bidirectional	GPIO PC14, also XTL 32.768 kHz low-speed crystal oscillator input (XTLI).
4	PC15/XTLO	bidirectional	GPIO PC15, also XTL 32.768 kHz low-speed crystal oscillator output (XTLO).
5	PF00/XTHI	bidirectional	GPIO PF00, also XTH high-speed 4-32 MHz crystal input (XTHI). Digital alt: I2C0_SDA, UART1_TXD.
6	PF01/XTHO	bidirectional	GPIO PF01, also XTH high-speed 4-32 MHz crystal output (XTHO). Digital alt: I2C0_SCL, TIM4_CHB, UART1_RXD.
7	RESETB	input	Active-low external reset input. Internal pull-up; drive low to reset the MCU.
8	PC00	bidirectional	GPIO PC00; analog AIN10, VC0_INP0, VC1_INN0, LCD SEG27; digital LPTIM0_GATE, PCNT_S0, UART1_CTS, UART2_RTS.
9	PC01	bidirectional	GPIO PC01; analog AIN11, VC0_INP1, VC1_INN1, LCD SEG26; digital LPTIM0_TOG, TIM5_CHB, UART1_RTS, PCNT_S0FO, UART2_CTS.
10	PC02	bidirectional	GPIO PC02; analog AIN12, VC0_INP2, VC1_INN2, LCD SEG25; digital SPI1_MISO, LPTIM0_TOGN, PCNT_S1, UART2_RXD.
11	PC03	bidirectional	GPIO PC03; analog AIN13, VC0_INP3, VC1_INN3, LCD SEG24; digital SPI1_MOSI, LPTIM0_ETR/TOGN, PCNT_S1FO, UART2_TXD.
12	AVSS	power_in	Analog ground for ADC/DAC/comparators/op-amp. Connect to system ground plane through a low-impedance path.
13	AVCC	power_in	Analog supply for ADC/DAC/comparators/op-amp. 1.8-5.5 V, typically tied to DVCC through a filter.
14	PA00	bidirectional	GPIO PA00; analog AIN0, VC0_INP4/INN0, VC1_INP0/INN4, LCD SEG23; digital UART1_CTS, LPUART1_TXD, TIM0_ETR/CHA, VC0_OUT, TIM1_CHA, TIM3_ETR.
15	PA01	bidirectional	GPIO PA01; analog AIN1, VC0_INP5/INN1, VC1_INP1/INN5, LCD SEG22; digital UART1_RTS, LPUART1_RXD, TIM0_CHB, TIM1_ETR/CHB, HCLK_OUT, SPI1_MOSI.
16	PA02	bidirectional	GPIO PA02; analog AIN2, VC0_INP6/INN2, VC1_INP2, LCD SEG21; digital UART1_TXD, TIM0_CHA, VC1_OUT, TIM1_CHA, TIM2_CHA, PCLK_OUT, SPI1_MISO.
17	PA03	bidirectional	GPIO PA03; analog AIN3, VC0_INP7/INN3, VC1_INP3, LCD SEG20; digital UART1_RXD, TIM0_GATE, TIM1_CHB, TIM2_CHB, SPI1_CS, TIM3_CH1A, TIM5_CHA.
18	PF04	bidirectional	General-purpose I/O PF04. No dedicated analog/timer alt-functions on this package.
19	PF05	bidirectional	General-purpose I/O PF05. No dedicated analog/timer alt-functions on this package.
20	PA04	bidirectional	GPIO PA04; analog AIN4, VC0_INP8/INN4, VC1_INP4, DAC_OUT, OPA_OUT0, LCD SEG19; digital SPI0_CS, UART1_TXD, PCA_CH4, TIM2_ETR, TIM5_CHA, LVD_OUT, TIM3_CH2B.
21	PA05	bidirectional	GPIO PA05; analog AIN5, VC0_INP9/INN5, VC1_INP5, VC2_INP0/INN0, OPA_OUT1, LCD SEG18; digital SPI0_SCK, TIM0_ETR/CHA, PCA_ECI, TIM5_CHB, XTL_OUT, XTH_OUT.
22	PA06	bidirectional	GPIO PA06; analog AIN6, VC0_INP10/INN6, OPA_OUT2, LCD SEG17; digital SPI0_MISO, PCA_CH0, TIM3_BK/GATE, TIM1_CHA, VC0_OUT, LPUART0_CTS.
23	PA07	bidirectional	GPIO PA07; analog AIN7, VC0_INP11/INN7, OPA_OUT3, LCD SEG16; digital SPI0_MOSI, PCA_CH1, HCLK_OUT, TIM3_CH0B, TIM2_CHA, VC1_OUT, TIM4_CHB.
24	PC04	bidirectional	GPIO PC04; analog AIN14, VC0_INN8, OPA_OUT4, LCD SEG15; digital LPUART0_TXD, TIM2_ETR, IR_OUT, VC2_OUT.
25	PC05	bidirectional	GPIO PC05; analog AIN15, VC0_INN9, OPA_INN, LCD SEG14; digital LPUART0_RXD, TIM6_CHB, PCA_CH4.
26	PB00	bidirectional	GPIO PB00; analog AIN8, VC0_INN10, VC1_INN6, OPA_INP, LCD SEG13; digital PCA_CH2, TIM3_CH1B, LPUART0_TXD, TIM5_CHB, RCH_OUT, RCL_OUT, PLL_OUT.
27	PB01	bidirectional	GPIO PB01; analog AIN9/EXVREF, VC1_INP6/INN7, VC2_INP1/INN1, LCD SEG12; digital PCA_CH3, PCLK_OUT, TIM3_CH2B, TIM6_CHB, LPUART0_RTS, VC2_OUT, TCLK_OUT.
28	PB02	bidirectional	GPIO PB02; analog AIN16, VC1_INP7/INN8, LCD SEG11; digital LPTIM0_TOG, PCA_ECI, LPUART1_TXD, TIM4_CHA, TIM0/1/2_BK.
29	PB10	bidirectional	GPIO PB10; analog AIN17, VC1_INP8, LCD SEG10; digital I2C1_SCL, SPI1_SCK, TIM1_CHA, LPUART0_TXD, TIM3_CH1A, LPUART1_RTS, UART1_RTS.
30	PB11	bidirectional	GPIO PB11; analog AIN18, VC2_INP8/INN4, LCD SEG9; digital I2C1_SDA, TIM1_CHB, LPUART0_RXD, TIM2_GATE, TIM6_CHA, LPUART1_CTS, UART1_CTS.
31	DVSS	power_in	Digital ground. Connect to system ground plane.
32	DVCC	power_in	Digital core/IO supply, 1.8-5.5 V. Decouple with a 100 nF ceramic cap close to the pin.
33	PB12	bidirectional	GPIO PB12; analog AIN19, VC1_INP9, LCD SEG8; digital SPI1_CS, TIM3_BK, LPUART0_TXD, TIM0_BK, LPUART0_RTS, TIM6_CHA.
34	PB13	bidirectional	GPIO PB13; analog AIN20, VC1_INP10, LCD SEG7; digital SPI1_SCK, I2C1_SCL, TIM3_CH0B, LPUART0_CTS, TIM1_CHA/GATE, TIM6_CHB.
35	PB14	bidirectional	GPIO PB14; analog AIN21, VC1_INP11, VC2_INP9/INN5, LCD SEG6; digital SPI1_MISO, I2C1_SDA, TIM3_CH1B, TIM0_CHA, RTC_1HZ, LPUART0_RTS, TIM1_BK.
36	PB15	bidirectional	GPIO PB15; analog AIN22, LCD SEG5; digital SPI1_MOSI, TIM3_CH2B, TIM0_CHB/GATE, LPUART1_RXD.
37	PC06	bidirectional	GPIO PC06; analog LCD SEG4; digital PCA_CH0, TIM4_CHA, TIM2_CHA, LPTIM1_GATE, UART3_RXD.
38	PC07	bidirectional	GPIO PC07; analog VC2_INP13/INN8, LCD SEG3; digital PCA_CH1, TIM5_CHA, TIM2_CHB, LPTIM1_EXT, UART3_TXD.
39	PC08	bidirectional	GPIO PC08; analog LCD SEG2; digital PCA_CH2, TIM6_CHA, TIM2_ETR, LPTIM1_TOG, UART3_CTS.
40	PC09	bidirectional	GPIO PC09; analog LCD SEG1; digital PCA_CH3, TIM4_CHB, TIM1_ETR, LPTIM1_TOGN, UART3_RTS.
41	PA08	bidirectional	GPIO PA08; analog LCD SEG0; digital UART0_TXD, TIM3_CH0A, TIM1_GATE, TIM4_CHA, TIM3_BK.
42	PA09	bidirectional	GPIO PA09; LCD COM0; digital UART0_TXD, TIM3_CH1A, TIM0_BK, I2C0_SCL, HCLK_OUT, TIM5_CHA.
43	PA10	bidirectional	GPIO PA10; LCD COM1; digital UART0_RXD, TIM3_CH2A, TIM2_BK/GATE, I2C0_SDA, PCLK_OUT, TIM6_CHA.
44	PA11	bidirectional	GPIO PA11; LCD COM2; digital UART0_CTS, TIM3_GATE, I2C1_SCL, VC0_OUT, SPI0_MISO, TIM4_CHB.
45	PA12	bidirectional	GPIO PA12; LCD COM3; digital UART0_RTS, TIM3_ETR, I2C1_SDA, VC1_OUT, SPI0_MOSI, PCNT_S0.
46	PA13/SWDIO	bidirectional	SWD data I/O (default after reset). GPIO PA13 alt: IR_OUT, UART0_RXD, LVD_OUT, TIM3_ETR, RTC_1HZ, PCNT_S1, VC2_OUT.
47	PF06	bidirectional	GPIO PF06; digital I2C1_SCL, LPUART1_CTS, UART0_CTS.
48	PF07	bidirectional	GPIO PF07; digital I2C1_SDA, LPUART1_RTS, UART0_RTS.
49	PA14/SWCLK	bidirectional	SWD clock input (default after reset). GPIO PA14 alt: UART1_TXD, UART0_TXD, TIM3_CH2A, LVD_OUT, RCH_OUT, RCL_OUT, PLL_OUT.
50	PA15	bidirectional	GPIO PA15; digital SPI0_CS, UART1_RXD, LPUART1_RTS, TIM0_ETR/CHA, TIM3_CH1A.
51	PC10	bidirectional	GPIO PC10; LCD COM4/SEG39; digital LPUART1_TXD, LPUART0_TXD, PCA_CH2.
52	PC11	bidirectional	GPIO PC11; LCD COM5/SEG38; digital LPUART1_RXD, LPUART0_RXD, PCA_CH3, PCNT_S0FO.
53	PC12	bidirectional	GPIO PC12; LCD COM6/SEG37; digital LPUART0_TXD, LPUART1_TXD, PCA_CH4, PCNT_S1FO.
54	PD02	bidirectional	GPIO PD02; LCD COM7/SEG36; digital PCA_ECI, LPUART0_RTS, TIM1_ETR.
55	PB03	bidirectional	GPIO PB03; analog VC1_INN9, LCD SEG35/VLCDH; digital SPI0_SCK, TIM0_CHB, TIM1_GATE, TIM3_CH0A, LPTIM0_GATE, XTL_OUT, XTH_OUT.
56	PB04	bidirectional	GPIO PB04; analog VC0_INP12, VC1_INP12, LCD SEG34/VLCD3; digital SPI0_MISO, PCA_CH0, TIM2_BK/GATE, UART0_CTS, TIM3_CH0B, LPTIM0_ETR.
57	PB05	bidirectional	GPIO PB05; analog VC0_INP13, LCD SEG33/VLCD2; digital SPI0_MOSI, TIM1_BK, PCA_CH1, LPTIM0_GATE, PCNT_S0, UART0_RTS.
58	PB06	bidirectional	GPIO PB06; analog VC0_INP14, VC1_INP14, LCD SEG32/VLCD1; digital I2C0_SCL, UART0_TXD, TIM1_CHB, TIM0_CHA, LPTIM0_ETR, TIM3_CH0A, LPTIM0_TOG.
59	PB07	bidirectional	GPIO PB07; analog VC1_INP15, LVD2, LCD SEG31; digital I2C0_SDA, UART0_RXD, TIM2_CHB, LPUART1_CTS, TIM0_CHB, LPTIM0_TOGN, PCNT_S1.
60	BOOT0/PF11	input	Boot mode / ISP entry pin sampled at reset; also usable as GPIO PF11 and LCD SEG30 after boot.
61	PB08	bidirectional	GPIO PB08; analog LVD1, LCD SEG29; digital I2C0_SCL, TIM1_CHA, TIM2_CHA, TIM0_GATE, TIM3_CH2A, UART0_TXD.
62	PB09	bidirectional	GPIO PB09; LCD SEG28; digital I2C0_SDA, IR_OUT, SPI1_CS, TIM2_CHA/CHB, UART0_RXD.
63	DVSS	power_in	Digital ground (second DVSS pin).
64	DVCC	power_in	Digital core/IO supply (second DVCC pin), 1.8-5.5 V. Decouple with 100 nF close to the pin.

Key specifications

Parameter	Value
Manufacturer	XHSC
Package	LQFP-64(10x10)
Category	MCU
Pins	64

Ordering variants

Same part, different packaging or reel option.

HC32L176PATA-LQFP100
HC32L176MATA-LQFP80
HC32L176KATA-LQFP64
HC32L176KATA-LQ64
HC32L176JATA-LQ48
HC32L170JATA-LQ48
HC32L170FAUA-QFN32TR

CAD (KiCad official)

Symbol: HC32L176KATA-LQFP64
Footprint: Package_QFP:LQFP-64_10x10mm_P0.5mm
3D model: LQFP-64(10x10) (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: XHSC datasheet (98 pp, sha256 566056c166174c9d, retrieved 2026-08-17, tier: lcsc)
Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF