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hc32l176jata-lq48

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by Ray

XHSC Microcontrollers (MCU/MPU/SOC), LQFP-48(7x7). Datasheet-verified pinout, KiCad symbol/footprint/3D.

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README

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HC32L176JATA-LQ48

XHSC · Microcontrollers (MCU/MPU/SOC) · LQFP-48(7x7)

HC32L176JATA-LQ48 from XHSC, in a LQFP-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VCAP power_out Internal LDO core-voltage output. Must be tied to an external decoupling capacitor of not less than 1 uF to DVSS; for internal circuit use only, do not draw current externally.
2 PC13 bidirectional General-purpose I/O on port C bit 13. Alternate digital functions: RTC_1HZ, TIM3_CH1B; analog function: LVD0 input.
3 PC14/XTLI bidirectional General-purpose I/O on port C bit 14, or low-speed external crystal (XTL) input pin. Configure via clock control registers when driving a 32.768 kHz crystal.
4 PC15/XTLO bidirectional General-purpose I/O on port C bit 15, or low-speed external crystal (XTL) output pin. Pairs with PC14/XTLI for the 32.768 kHz oscillator.
5 PF00/XTHI bidirectional General-purpose I/O on port F bit 0, or high-speed external crystal (XTH) input (4-32 MHz). Alternate digital functions: I2C0_SDA, UART1_TXD.
6 PF01/XTHO bidirectional General-purpose I/O on port F bit 1, or high-speed external crystal (XTH) output. Alternate digital functions: I2C0_SCL, TIM4_CHB, UART1_RXD.
7 RESETB input Active-low external reset input with internal pull-up. Drive low to assert a chip reset.
8 AVSS power_in Analog ground. Tie to the analog return of the ADC/DAC/OPA/VC supply; typically joined to DVSS at a single point.
9 AVCC power_in Analog supply voltage (1.8-5.5 V) for ADC, DAC, comparators, and op-amp. Decouple with 100 nF close to the pin.
10 PA00/SEG23 bidirectional General-purpose I/O on port A bit 0. Digital alt: UART1_CTS, LPUART1_TXD, TIM0_ETR, VC0_OUT, TIM1_CHA, TIM3_ETR, TIM0_CHA. Analog: AIN0, VC0_INP4, VC0_INN0, VC1_INP0, VC1_INN4. LCD SEG23.
11 PA01/SEG22 bidirectional General-purpose I/O on port A bit 1. Digital alt: UART1_RTS, LPUART1_RXD, TIM0_CHB, TIM1_ETR, TIM1_CHB, HCLK_OUT, SPI1_MOSI. Analog: AIN1, VC0_INP5, VC0_INN1, VC1_INP1, VC1_INN5. LCD SEG22.
12 PA02/SEG21 bidirectional General-purpose I/O on port A bit 2. Digital alt: UART1_TXD, TIM0_CHA, VC1_OUT, TIM1_CHA, TIM2_CHA, PCLK_OUT, SPI1_MISO. Analog: AIN2, VC0_INP6, VC0_INN2, VC1_INP2. LCD SEG21.
13 PA03/SEG20 bidirectional General-purpose I/O on port A bit 3. Digital alt: UART1_RXD, TIM0_GATE, TIM1_CHB, TIM2_CHB, SPI1_CS, TIM3_CH1A, TIM5_CHA. Analog: AIN3, VC0_INP7, VC0_INN3, VC1_INP3. LCD SEG20.
14 PA04/SEG19 bidirectional General-purpose I/O on port A bit 4. Digital alt: SPI0_CS, UART1_TXD, PCA_CH4, TIM2_ETR, TIM5_CHA, LVD_OUT, TIM3_CH2B. Analog: AIN4, VC0_INP8, VC0_INN4, VC1_INP4, DAC_OUT, OPA_OUT0. LCD SEG19.
15 PA05/SEG18 bidirectional General-purpose I/O on port A bit 5. Digital alt: SPI0_SCK, TIM0_ETR, PCA_ECI, TIM0_CHA, TIM5_CHB, XTL_OUT, XTH_OUT. Analog: AIN5, VC0_INP9, VC0_INN5, VC1_INP5, VC2_INP0, VC2_INN0, OPA_OUT1. LCD SEG18.
16 PA06/SEG17 bidirectional General-purpose I/O on port A bit 6. Digital alt: SPI0_MISO, PCA_CH0, TIM3_BK, TIM1_CHA, VC0_OUT, TIM3_GATE, LPUART0_CTS. Analog: AIN6, VC0_INP10, VC0_INN6, OPA_OUT2. LCD SEG17.
17 PA07/SEG16 bidirectional General-purpose I/O on port A bit 7. Digital alt: SPI0_MOSI, PCA_CH1, HCLK_OUT, TIM3_CH0B, TIM2_CHA, VC1_OUT, TIM4_CHB. Analog: AIN7, VC0_INP11, VC0_INN7, OPA_OUT3. LCD SEG16.
18 PB00/SEG13 bidirectional General-purpose I/O on port B bit 0. Digital alt: PCA_CH2, TIM3_CH1B, LPUART0_TXD, TIM5_CHB, RCH_OUT, RCL_OUT, PLL_OUT. Analog: AIN8, VC0_INN10, VC1_INN6, OPA_INP. LCD SEG13.
19 PB01/SEG12 bidirectional General-purpose I/O on port B bit 1. Digital alt: PCA_CH3, PCLK_OUT, TIM3_CH2B, TIM6_CHB, LPUART0_RTS, VC2_OUT, TCLK_OUT. Analog: AIN9/EXVREF, VC1_INP6, VC1_INN7, VC2_INP1, VC2_INN1. LCD SEG12.
20 PB02/SEG11 bidirectional General-purpose I/O on port B bit 2. Digital alt: LPTIM0_TOG, PCA_ECI, LPUART1_TXD, TIM4_CHA, TIM1_BK, TIM0_BK, TIM2_BK. Analog: AIN16, VC1_INP7, VC1_INN8. LCD SEG11.
21 PB10/SEG10 bidirectional General-purpose I/O on port B bit 10. Digital alt: I2C1_SCL, SPI1_SCK, TIM1_CHA, LPUART0_TXD, TIM3_CH1A, LPUART1_RTS, UART1_RTS. Analog: AIN17, VC1_INP8. LCD SEG10.
22 PB11/SEG9 bidirectional General-purpose I/O on port B bit 11. Digital alt: I2C1_SDA, TIM1_CHB, LPUART0_RXD, TIM2_GATE, TIM6_CHA, LPUART1_CTS, UART1_CTS. Analog: AIN18, VC2_INP8, VC2_INN4. LCD SEG9.
23 DVSS power_in Digital ground return for the core, I/O ring, and digital peripherals.
24 DVCC power_in Digital supply voltage (1.8-5.5 V) for the I/O ring and digital peripherals. Decouple with 100 nF close to the pin.
25 PB12/SEG8 bidirectional General-purpose I/O on port B bit 12. Digital alt: SPI1_CS, TIM3_BK, LPUART0_TXD, TIM0_BK, LPUART0_RTS, TIM6_CHA. Analog: AIN19, VC1_INP9. LCD SEG8.
26 PB13/SEG7 bidirectional General-purpose I/O on port B bit 13. Digital alt: SPI1_SCK, I2C1_SCL, TIM3_CH0B, LPUART0_CTS, TIM1_CHA, TIM1_GATE, TIM6_CHB. Analog: AIN20, VC1_INP10. LCD SEG7.
27 PB14/SEG6 bidirectional General-purpose I/O on port B bit 14. Digital alt: SPI1_MISO, I2C1_SDA, TIM3_CH1B, TIM0_CHA, RTC_1HZ, LPUART0_RTS, TIM1_BK. Analog: AIN21, VC1_INP11, VC2_INP9, VC2_INN5. LCD SEG6.
28 PB15/SEG5 bidirectional General-purpose I/O on port B bit 15. Digital alt: SPI1_MOSI, TIM3_CH2B, TIM0_CHB, TIM0_GATE, LPUART1_RXD. Analog: AIN22. LCD SEG5.
29 PA08/SEG0 bidirectional General-purpose I/O on port A bit 8. Digital alt: UART0_TXD, TIM3_CH0A, TIM1_GATE, TIM4_CHA, TIM3_BK. LCD SEG0.
30 PA09/COM0 bidirectional General-purpose I/O on port A bit 9. Digital alt: UART0_TXD, TIM3_CH1A, TIM0_BK, I2C0_SCL, HCLK_OUT, TIM5_CHA. LCD COM0 common driver.
31 PA10/COM1 bidirectional General-purpose I/O on port A bit 10. Digital alt: UART0_RXD, TIM3_CH2A, TIM2_BK, I2C0_SDA, TIM2_GATE, PCLK_OUT, TIM6_CHA. LCD COM1 common driver.
32 PA11/COM2 bidirectional General-purpose I/O on port A bit 11. Digital alt: UART0_CTS, TIM3_GATE, I2C1_SCL, VC0_OUT, SPI0_MISO, TIM4_CHB. LCD COM2 common driver.
33 PA12/COM3 bidirectional General-purpose I/O on port A bit 12. Digital alt: UART0_RTS, TIM3_ETR, I2C1_SDA, VC1_OUT, SPI0_MOSI, PCNT_S0. LCD COM3 common driver.
34 PA13/SWDIO bidirectional SWD data pin (default after reset) or general-purpose I/O on port A bit 13. Digital alt: IR_OUT, UART0_RXD, LVD_OUT, TIM3_ETR, RTC_1HZ, PCNT_S1, VC2_OUT.
35 PF06 bidirectional General-purpose I/O on port F bit 6. Digital alt: I2C1_SCL, LPUART1_CTS, UART0_CTS.
36 PF07 bidirectional General-purpose I/O on port F bit 7. Digital alt: I2C1_SDA, LPUART1_RTS, UART0_RTS.
37 PA14/SWCLK bidirectional SWD clock pin (default after reset) or general-purpose I/O on port A bit 14. Digital alt: UART1_TXD, UART0_TXD, TIM3_CH2A, LVD_OUT, RCH_OUT, RCL_OUT, PLL_OUT.
38 PA15 bidirectional General-purpose I/O on port A bit 15. Digital alt: SPI0_CS, UART1_RXD, LPUART1_RTS, TIM0_ETR, TIM0_CHA, TIM3_CH1A.
39 PB03/SEG35/VLCDH bidirectional General-purpose I/O on port B bit 3. Digital alt: SPI0_SCK, TIM0_CHB, TIM1_GATE, TIM3_CH0A, LPTIM0_GATE, XTL_OUT, XTH_OUT. Analog: VC1_INN9. LCD SEG35 or LCD VLCDH bias-generator top-rail pin.
40 PB04/SEG34/VLCD3 bidirectional General-purpose I/O on port B bit 4. Digital alt: SPI0_MISO, PCA_CH0, TIM2_BK, UART0_CTS, TIM2_GATE, TIM3_CH0B, LPTIM0_ETR. Analog: VC0_INP12, VC1_INP12. LCD SEG34 or LCD VLCD3 bias pin.
41 PB05/SEG33/VLCD2 bidirectional General-purpose I/O on port B bit 5. Digital alt: SPI0_MOSI, TIM1_BK, PCA_CH1, LPTIM0_GATE, PCNT_S0, UART0_RTS. Analog: VC0_INP13. LCD SEG33 or LCD VLCD2 bias pin.
42 PB06/SEG32/VLCD1 bidirectional General-purpose I/O on port B bit 6. Digital alt: I2C0_SCL, UART0_TXD, TIM1_CHB, TIM0_CHA, LPTIM0_ETR, TIM3_CH0A, LPTIM0_TOG. Analog: VC0_INP14, VC1_INP14. LCD SEG32 or LCD VLCD1 bias pin.
43 PB07/SEG31 bidirectional General-purpose I/O on port B bit 7. Digital alt: I2C0_SDA, UART0_RXD, TIM2_CHB, LPUART1_CTS, TIM0_CHB, LPTIM0_TOGN, PCNT_S1. Analog: VC1_INP15, LVD2. LCD SEG31.
44 BOOT0/PF11/SEG30 input BOOT0 selection pin sampled at reset - high enters ISP mode (Flash programming over the ISP protocol), low enters user mode (executes application from Flash; SWD programming still available). Also usable as GPIO PF11 or LCD SEG30 after reset.
45 PB08/SEG29 bidirectional General-purpose I/O on port B bit 8. Digital alt: I2C0_SCL, TIM1_CHA, TIM2_CHA, TIM0_GATE, TIM3_CH2A, UART0_TXD. Analog: LVD1. LCD SEG29.
46 PB09/SEG28 bidirectional General-purpose I/O on port B bit 9. Digital alt: I2C0_SDA, IR_OUT, SPI1_CS, TIM2_CHA, TIM2_CHB, UART0_RXD. LCD SEG28.
47 DVSS power_in Digital ground return for the core, I/O ring, and digital peripherals (second ground pin).
48 DVCC power_in Digital supply voltage (1.8-5.5 V) for the I/O ring and digital peripherals (second supply pin). Decouple with 100 nF close to the pin.

Key specifications

Parameter Value
Manufacturer XHSC
Package LQFP-48(7x7)
Category MCU
Pins 48

Ordering variants

  • HC32L176JATA-LQ48PATA-LQFP100
  • HC32L176JATA-LQ48MATA-LQFP80
  • HC32L176JATA-LQ48KATA-LQFP64
  • HC32L176JATA-LQ48KATA-LQ64
  • HC32L176JATA-LQ48
  • HC32L176JATA-LQ48FAUA-QFN32TR

CAD (KiCad official)

  • Symbol: HC32L176JATA-LQ48
  • Footprint: Package_QFP:LQFP-48_7x7mm_P0.5mm
  • 3D model: LQFP-48(7x7) (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: XHSC datasheet (None pp, sha256 566056c166174c9d, retrieved 2026-08-17, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

Symbol & Footprint

Schematic Symbol

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PCB Footprint

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