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HC32L072FAUA-QN32TR
Public Unreviewedby Ray
XHSC Microcontrollers (MCU/MPU/SOC), QFN-32-EP(5x5). Datasheet-verified pinout, KiCad symbol/footprint/3D.
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markdownHC32L072FAUA-QN32TR
XHSC · Microcontrollers (MCU/MPU/SOC) · QFN-32-EP(5x5)
HC32L072FAUA-QN32TR from XHSC, in a QFN-32-EP(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PC14/XTLI | bidirectional | GPIO PC14; low-speed 32.768 kHz crystal oscillator input (XTLI) when RTC LSE is used. |
| 2 | PC15/XTLO | bidirectional | GPIO PC15; low-speed 32.768 kHz crystal oscillator output (XTLO) when RTC LSE is used. |
| 3 | RESETB | input | Active-low external reset input. Internal pull-up; drive low to reset the MCU. |
| 4 | AVSS | power_in | Analog ground reference for the ADC, DAC, comparators and analog blocks. Tie to system ground. |
| 5 | AVCC | power_in | Analog supply (2.0-5.5 V typical) for ADC/DAC/comparators. Decouple with 100 nF close to the pin. |
| 6 | PA00 | bidirectional | GPIO PA0 with alt-functions: UART1_CTS, LPUART1_TXD, TIM0/1/3 channels, VC0/VC1 comparator inputs, AIN0 ADC input, SEG23 LCD. |
| 7 | PA01 | bidirectional | GPIO PA1 with alt-functions: UART1_RTS, LPUART1_RXD, TIM0/1 channels, HCLK_OUT, SPI1_MOSI, AIN1, VC0/VC1 comp, SEG22 LCD. |
| 8 | PA02 | bidirectional | GPIO PA2 with alt-functions: UART1_TXD, TIM0/1/2 channels, VC1_OUT, PCLK_OUT, SPI1_MISO, AIN2, VC0/VC1 comp, SEG21 LCD. |
| 9 | PA03 | bidirectional | GPIO PA3 with alt-functions: UART1_RXD, TIM0_GATE, TIM1/2/3/5 channels, SPI1_CS, AIN3, VC0/VC1 comp, SEG20 LCD. |
| 10 | PA04 | bidirectional | GPIO PA4 with alt-functions: SPI0_CS, UART1_TXD, PCA_CH4, TIM2_ETR/TIM3/TIM5, LVD_OUT, AIN4, VC0/VC1 comp, OP3_OUT, DAC0_OUT, SEG19. |
| 11 | PA05 | bidirectional | GPIO PA5 with alt-functions: SPI0_SCK, TIM0_ETR, PCA_ECI, TIM0/5 channels, XTL_OUT/XTH_OUT, AIN5, VC0/VC1/VC2 comp, OP4_OUT, DAC1_OUT, SEG18. |
| 12 | PA06 | bidirectional | GPIO PA6 with alt-functions: SPI0_MISO, PCA_CH0, TIM1/3, VC0_OUT, TIM3_GATE, LPUART0_CTS, AIN6, VC0 comp, OP4_INN, SEG17. |
| 13 | PA07 | bidirectional | GPIO PA7 with alt-functions: SPI0_MOSI, PCA_CH1, HCLK_OUT, TIM2/3/4, VC1_OUT, AIN7, VC0 comp, OP4_INP, SEG16. |
| 14 | PB00 | bidirectional | GPIO PB0 with alt-functions: PCA_CH2, TIM3/5, LPUART0_TXD, RCH/RCL/PLL_OUT, AIN8, VC1 comp, OP3_INP, SEG13. |
| 15 | PB01 | bidirectional | GPIO PB1 with alt-functions: PCA_CH3, PCLK_OUT, TIM3/6, LPUART0_RTS, VC2_OUT, TCLK_OUT, AIN9/EXVREF external reference input, VC1/VC2 comp, SEG12. |
| 16 | DVSS | power_in | Digital ground return for the MCU core and digital I/O. Tie to system ground plane. |
| 17 | DVCC | power_in | Digital supply input (2.0-5.5 V). Decouple with 100 nF close to the pin. |
| 18 | PA08 | bidirectional | GPIO PA8 with alt-functions: UART0_TXD, TIM3_CH0A, CRS_SYNC, CAN_STBY, TIM1_GATE, TIM4_CHA, TIM3_BK, SEG0 LCD. |
| 19 | PA09 | bidirectional | GPIO PA9 with alt-functions: UART0_TXD, TIM3_CH1A, TIM0_BK, I2C0_SCL, HCLK_OUT, TIM5_CHA, COM0 LCD backplane. |
| 20 | PA10 | bidirectional | GPIO PA10 with alt-functions: UART0_RXD, TIM3_CH2A, TIM2_BK, I2C0_SDA, TIM2_GATE, PCLK_OUT, TIM6_CHA, COM1 LCD backplane. |
| 21 | USBDM | bidirectional | USB 2.0 full-speed D− data line (HC32L072 variants only). Requires ~22 Ω series termination per USB spec. |
| 22 | USBDP | bidirectional | USB 2.0 full-speed D+ data line (HC32L072 variants only). Requires ~22 Ω series termination per USB spec. |
| 23 | PA13 | bidirectional | GPIO PA13; SWDIO SWD debug data (default after reset). Alt: IR_OUT, UART0_RXD, LVD_OUT, TIM3_ETR, RTC_1HZ, PCNT_S1, VC2_OUT. |
| 24 | AVCC_USB | power_in | USB analog supply (3.3 V nominal for USB PHY). Decouple close to the pin; required for USB functionality on HC32L072. |
| 25 | PA14 | bidirectional | GPIO PA14; SWCLK SWD debug clock (default after reset). Alt: UART1_TXD, UART0_TXD, TIM3_CH2A, LVD_OUT, RCH/RCL/PLL_OUT. |
| 26 | PB04 | bidirectional | GPIO PB4 with alt-functions: SPI0_MISO, PCA_CH0, TIM2_BK, UART0_CTS, TIM2_GATE, TIM3_CH0B, LPTIM0_EXT, AIN input, SEG34/VLCD3 for LCD driver. |
| 27 | PB05 | bidirectional | GPIO PB5 with alt-functions: SPI0_MOSI, TIM1_BK, PCA_CH1, LPTIM0_GATE, PCNT_S0, UART0_RTS, AIN input, SEG33/VLCD2 for LCD driver. |
| 28 | BOOT0/PF11 | input | BOOT0 selection input at reset (also PF11 GPIO, SEG30). Sample on reset to choose boot mode; usually tied via pull-down for main-flash boot. |
| 29 | PB08 | bidirectional | GPIO PB8 with alt-functions: I2C0_SCL, TIM1_CHA, CAN_RX, TIM2_CHA, TIM0_GATE, TIM3_CH2A, UART0_TXD, LVD1 analog, SEG29 LCD. |
| 30 | PB09 | bidirectional | GPIO PB9 with alt-functions: I2C0_SDA, IR_OUT, SPI1_CS, TIM2_CHA/CHB, CAN_TX, UART0_RXD, SEG28 LCD. |
| 31 | DVSS | power_in | Second digital ground return. Tie to system ground plane. |
| 32 | VCAP | passive | Internal LDO decoupling / core-supply capacitor pin. Connect a low-ESR ceramic capacitor (typ. 2.2 µF) to VSS. Do NOT drive. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | XHSC |
| Package | QFN-32-EP(5x5) |
| Category | MCU |
| Pins | 32 |
Ordering variants
Same part, different packaging or reel option.
HC32L072FAUA-QN32TRHC32L072FAUA-QN32TRJATA-LQ48HC32L072FAUA-QN32TRJATA-LQFP48HC32L072FAUA-QN32TRKATA-LQFP64HC32L072FAUA-QN32TRPATA-LQFP100
CAD (KiCad official)
- Symbol:
HC32L072FAUA-QN32TR - Footprint:
Package_DFN_QFN:QFN-32-1EP_5x5mm_P0.5mm_EP3.3x3.3mm - 3D model: QFN-32-EP(5x5) (KiCad packages3D, STEP)
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: XHSC datasheet (102 pp, sha256
d7134b3d9cd4f117, retrieved 2026-08-17, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).