component

HC32F176KATA-LQ64

Public Unreviewed

by Ray

XHSC Microcontrollers (MCU/MPU/SOC), LQFP-64(7x7). Datasheet-verified pinout, KiCad symbol/footprint/3D.

componentmcuhc32f176kata-lq64
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity

3D Model

Open in new tab ↗
Loads on click. Unloads when scrolled away or the tab is hidden.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads on click. Unloads when scrolled away or the tab is hidden.

PCB Footprint

Open full view ↗
Loads on click. Unloads when scrolled away or the tab is hidden.

Datasheet

Open in new tab ↗
Loads on click. Unloads when scrolled away or the tab is hidden.
Download PDF
Contents

README

markdown

HC32F176KATA-LQ64

XHSC · Microcontrollers (MCU/MPU/SOC) · LQFP-64(7x7)

HC32F176KATA-LQ64 from XHSC, in a LQFP-64(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VCAP passive Internal LDO decoupling capacitor pin. Connect an external ceramic cap (typically 1 uF) to DVSS; do not drive.
2 PC13 bidirectional GPIO PC13. Alternate digital: TIM3_CH1B. Analog: LVD0 input.
3 PC14/XTLI bidirectional GPIO PC14 muxed with 32.768 kHz LSE crystal input (XTLI).
4 PC15/XTLO bidirectional GPIO PC15 muxed with 32.768 kHz LSE crystal output (XTLO).
5 PF00/XTHI bidirectional GPIO PF00. Alt digital: I2C0_SDA, UART1_TXD. Analog: HSE crystal input (XTHI).
6 PF01/XTHO bidirectional GPIO PF01. Alt digital: I2C0_SCL, TIM4_CHB, UART1_RXD. Analog: HSE crystal output (XTHO).
7 RESETB input Active-low external reset input. Internal pull-up; drive low to reset the MCU.
8 PC00 bidirectional GPIO PC00. Alt digital: UART1_CTS, UART2_RTS. Analog: AIN10, VC0_INP0, VC1_INN0, SEG27.
9 PC01 bidirectional GPIO PC01. Alt digital: TIM5_CHB, UART1_RTS, UART2_CTS. Analog: AIN11, VC0_INP1, VC1_INN1, SEG26.
10 PC02 bidirectional GPIO PC02. Alt digital: SPI1_MISO, UART2_RXD. Analog: AIN12, VC0_INP2, VC1_INN2, SEG25.
11 PC03 bidirectional GPIO PC03. Alt digital: SPI1_MOSI, UART2_TXD. Analog: AIN13, VC0_INP3, VC1_INN3, SEG24.
12 AVSS power_in Analog ground reference for ADC/DAC/opamp/comparator subsystem. Tie to DVSS at a single point.
13 AVCC power_in Analog supply (typically 2.5-5.5 V). Decouple to AVSS with 100 nF + 10 uF near the pin.
14 PA00 bidirectional GPIO PA00. Alt digital: UART1_CTS, TIM0_ETR, VC0_OUT, TIM1_CHA, TIM3_ETR, TIM0_CHA. Analog: AIN0, VC0_INP4, VC0_INN0, VC1_INP0, VC1_INN4, SEG23.
15 PA01 bidirectional GPIO PA01. Alt digital: UART1_RTS, TIM0_CHB, TIM1_ETR, TIM1_CHB, HCLK_OUT, SPI1_MOSI. Analog: AIN1, VC0_INP5, VC0_INN1, VC1_INP1, VC1_INN5, SEG22.
16 PA02 bidirectional GPIO PA02. Alt digital: UART1_TXD, TIM0_CHA, VC1_OUT, TIM1_CHA, TIM2_CHA, PCLK_OUT, SPI1_MISO. Analog: AIN2, VC0_INP6, VC0_INN2, VC1_INP2, SEG21.
17 PA03 bidirectional GPIO PA03. Alt digital: UART1_RXD, TIM0_GATE, TIM1_CHB, TIM2_CHB, SPI1_CS, TIM3_CH1A, TIM5_CHA. Analog: AIN3, VC0_INP7, VC0_INN3, VC1_INP3, SEG20.
18 PF04 bidirectional GPIO PF04. No documented alternate functions in this package.
19 PF05 bidirectional GPIO PF05. No documented alternate functions in this package.
20 PA04 bidirectional GPIO PA04. Alt digital: SPI0_CS, UART1_TXD, PCA_CH4, TIM2_ETR, TIM5_CHA, LVD_OUT, TIM3_CH2B. Analog: AIN4, VC0_INP8, VC0_INN4, VC1_INP4, DAC_OUT, OPA_OUT0, SEG19.
21 PA05 bidirectional GPIO PA05. Alt digital: SPI0_SCK, TIM0_ETR, PCA_ECI, TIM0_CHA, TIM5_CHB, XTL_OUT, XTH_OUT. Analog: AIN5, VC0_INP9, VC0_INN5, VC1_INP5, VC2_INP0, VC2_INN0, OPA_OUT1, SEG18.
22 PA06 bidirectional GPIO PA06. Alt digital: SPI0_MISO, PCA_CH0, TIM3_BK, TIM1_CHA, VC0_OUT, TIM3_GATE. Analog: AIN6, VC0_INP10, VC0_INN6, OPA_OUT2, SEG17.
23 PA07 bidirectional GPIO PA07. Alt digital: SPI0_MOSI, PCA_CH1, HCLK_OUT, TIM3_CH0B, TIM2_CHA, VC1_OUT, TIM4_CHB. Analog: AIN7, VC0_INP11, VC0_INN7, OPA_OUT3, SEG16.
24 PC04 bidirectional GPIO PC04. Alt digital: TIM2_ETR, IR_OUT, VC2_OUT. Analog: AIN14, VC0_INN8, OPA_OUT4, SEG15.
25 PC05 bidirectional GPIO PC05. Alt digital: TIM6_CHB, PCA_CH4. Analog: AIN15, VC0_INN9, OPA_INN, SEG14.
26 PB00 bidirectional GPIO PB00. Alt digital: PCA_CH2, TIM3_CH1B, TIM5_CHB, RCH_OUT, RCL_OUT, PLL_OUT. Analog: AIN8, VC0_INN10, VC1_INN6, OPA_INP, SEG13.
27 PB01 bidirectional GPIO PB01. Alt digital: PCA_CH3, PCLK_OUT, TIM3_CH2B, TIM6_CHB, VC2_OUT, TCLK_OUT. Analog: AIN9/EXVREF, VC1_INP6, VC1_INN7, VC2_INP1, VC2_INN1, SEG12.
28 PB02 bidirectional GPIO PB02. Alt digital: PCA_ECI, TIM4_CHA, TIM1_BK, TIM0_BK, TIM2_BK. Analog: AIN16, VC1_INP7, VC1_INN8, SEG11.
29 PB10 bidirectional GPIO PB10. Alt digital: I2C1_SCL, SPI1_SCK, TIM1_CHA, TIM3_CH1A, UART1_RTS. Analog: AIN17, VC1_INP8, SEG10.
30 PB11 bidirectional GPIO PB11. Alt digital: I2C1_SDA, TIM1_CHB, TIM2_GATE, TIM6_CHA, UART1_CTS. Analog: AIN18, VC2_INP8, VC2_INN4, SEG9.
31 DVSS power_in Digital ground return for the core and I/O.
32 DVCC power_in Digital supply for core and I/O (typ. 2.5-5.5 V). Decouple with 100 nF per pin.
33 PB12 bidirectional GPIO PB12. Alt digital: SPI1_CS, TIM3_BK, TIM0_BK, TIM6_CHA. Analog: AIN19, VC1_INP9, SEG8.
34 PB13 bidirectional GPIO PB13. Alt digital: SPI1_SCK, I2C1_SCL, TIM3_CH0B, TIM1_CHA, TIM1_GATE, TIM6_CHB. Analog: AIN20, VC1_INP10, SEG7.
35 PB14 bidirectional GPIO PB14. Alt digital: SPI1_MISO, I2C1_SDA, TIM3_CH1B, TIM0_CHA, TIM1_BK. Analog: AIN21, VC1_INP11, VC2_INP9, VC2_INN5, SEG6.
36 PB15 bidirectional GPIO PB15. Alt digital: SPI1_MOSI, TIM3_CH2B, TIM0_CHB, TIM0_GATE. Analog: AIN22, SEG5.
37 PC06 bidirectional GPIO PC06. Alt digital: PCA_CH0, TIM4_CHA, TIM2_CHA, UART3_RXD. Analog: SEG4.
38 PC07 bidirectional GPIO PC07. Alt digital: PCA_CH1, TIM5_CHA, TIM2_CHB, UART3_TXD. Analog: VC2_INP13, VC2_INN8, SEG3.
39 PC08 bidirectional GPIO PC08. Alt digital: PCA_CH2, TIM6_CHA, TIM2_ETR, UART3_CTS. Analog: SEG2.
40 PC09 bidirectional GPIO PC09. Alt digital: PCA_CH3, TIM4_CHB, TIM1_ETR, UART3_RTS. Analog: SEG1.
41 PA08 bidirectional GPIO PA08. Alt digital: UART0_TXD, TIM3_CH0A, TIM1_GATE, TIM4_CHA, TIM3_BK. Analog: SEG0.
42 PA09 bidirectional GPIO PA09. Alt digital: UART0_TXD, TIM3_CH1A, TIM0_BK, I2C0_SCL, HCLK_OUT, TIM5_CHA. Analog: COM0 (LCD).
43 PA10 bidirectional GPIO PA10. Alt digital: UART0_RXD, TIM3_CH2A, TIM2_BK, I2C0_SDA, TIM2_GATE, PCLK_OUT, TIM6_CHA. Analog: COM1 (LCD).
44 PA11 bidirectional GPIO PA11. Alt digital: UART0_CTS, TIM3_GATE, I2C1_SCL, VC0_OUT, SPI0_MISO, TIM4_CHB. Analog: COM2 (LCD).
45 PA12 bidirectional GPIO PA12. Alt digital: UART0_RTS, TIM3_ETR, I2C1_SDA, VC1_OUT, SPI0_MOSI. Analog: COM3 (LCD).
46 PA13/SWDIO bidirectional GPIO PA13 shared with SWD data (SWDIO). Alt digital: IR_OUT, UART0_RXD, LVD_OUT, TIM3_ETR, VC2_OUT.
47 PF06 bidirectional GPIO PF06. Alt digital: I2C1_SCL, UART0_CTS.
48 PF07 bidirectional GPIO PF07. Alt digital: I2C1_SDA, UART0_RTS.
49 PA14/SWCLK bidirectional GPIO PA14 shared with SWD clock (SWCLK). Alt digital: UART1_TXD, UART0_TXD, TIM3_CH2A, LVD_OUT, RCH_OUT, RCL_OUT, PLL_OUT.
50 PA15 bidirectional GPIO PA15. Alt digital: SPI0_CS, UART1_RXD, TIM0_ETR, TIM0_CHA, TIM3_CH1A.
51 PC10 bidirectional GPIO PC10. Alt digital: PCA_CH2. Analog: COM4/SEG39 (LCD).
52 PC11 bidirectional GPIO PC11. Alt digital: PCA_CH3. Analog: COM5/SEG38 (LCD).
53 PC12 bidirectional GPIO PC12. Alt digital: PCA_CH4. Analog: COM6/SEG37 (LCD).
54 PD02 bidirectional GPIO PD02. Alt digital: PCA_ECI, TIM1_ETR. Analog: COM7/SEG36 (LCD).
55 PB03 bidirectional GPIO PB03. Alt digital: SPI0_SCK, TIM0_CHB, TIM1_GATE, TIM3_CH0A, XTL_OUT, XTH_OUT. Analog: VC1_INN9, SEG35/VLCDH.
56 PB04 bidirectional GPIO PB04. Alt digital: SPI0_MISO, PCA_CH0, TIM2_BK, UART0_CTS, TIM2_GATE, TIM3_CH0B. Analog: VC0_INP12, VC1_INP12, SEG34/VLCD3.
57 PB05 bidirectional GPIO PB05. Alt digital: SPI0_MOSI, TIM1_BK, PCA_CH1, UART0_RTS. Analog: VC0_INP13, SEG33/VLCD2.
58 PB06 bidirectional GPIO PB06. Alt digital: I2C0_SCL, UART0_TXD, TIM1_CHB, TIM0_CHA, TIM3_CH0A. Analog: VC0_INP14, VC1_INP14, SEG32/VLCD1.
59 PB07 bidirectional GPIO PB07. Alt digital: I2C0_SDA, UART0_RXD, TIM2_CHB, TIM0_CHB. Analog: VC1_INP15, LVD2, SEG31.
60 BOOT0/PF11 input Boot mode select at reset; latched to select boot-from-Flash vs boot-from-ROM ISP. After reset also usable as GPIO PF11. Analog: SEG30.
61 PB08 bidirectional GPIO PB08. Alt digital: I2C0_SCL, TIM1_CHA, TIM2_CHA, TIM0_GATE, TIM3_CH2A, UART0_TXD. Analog: LVD1, SEG29.
62 PB09 bidirectional GPIO PB09. Alt digital: I2C0_SDA, IR_OUT, SPI1_CS, TIM2_CHA, TIM2_CHB, UART0_RXD. Analog: SEG28.
63 DVSS power_in Second digital ground return pin.
64 DVCC power_in Second digital supply pin (typ. 2.5-5.5 V). Decouple with 100 nF.

Key specifications

Parameter Value
Manufacturer XHSC
Package LQFP-64(7x7)
Category MCU
Pins 64

Ordering variants

Same part, different packaging or reel option.

  • HC32F176PATA-LQFP100
  • HC32F176MATA-LQFP80
  • HC32F176KATA-LQFP64
  • HC32F176KATA-LQ64

CAD (KiCad official)

  • Symbol: HC32F176KATA-LQ64
  • Footprint: Package_QFP:LQFP-64_7x7mm_P0.4mm
  • 3D model: LQFP-64(7x7) (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: XHSC datasheet (98 pp, sha256 656517d253eb7a18, retrieved 2026-08-17, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF