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GL3224-OIY04

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by Ray

Genesys Logic USB Converters, QFN-32-EP(5x5). Datasheet-verified pinout, KiCad symbol/footprint/3D.

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Symbol & Footprint

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Datasheet

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Contents

README

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GL3224-OIY04

Genesys Logic · USB Converters · QFN-32-EP(5x5)

GL3224-OIY04 from Genesys Logic, in a QFN-32-EP(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 TXN output USB 3.1 Gen 1 SuperSpeed differential transmit negative (SSTX-).
2 TXP output USB 3.1 Gen 1 SuperSpeed differential transmit positive (SSTX+).
3 AVDD12 power_in Analog 1.2 V power source for the USB PHY. Supplied from the on-chip 3.3 V→1.2 V regulator; requires local decoupling.
4 RXN input USB 3.1 Gen 1 SuperSpeed differential receive negative (SSRX-).
5 RXP input USB 3.1 Gen 1 SuperSpeed differential receive positive (SSRX+).
6 X1 input 25 MHz crystal input. Connects to one terminal of an external 25 MHz crystal or accepts an external 25 MHz clock.
7 X2 bidirectional 25 MHz crystal output/feedback. Connects to the second terminal of the external 25 MHz crystal.
8 AVDD33 power_in Analog 3.3 V power source for the USB PHY. Decouple locally to GND.
9 RTERM passive USB reference resistor. Sets the USB drive/termination level; tie to GND through a 680 Ω 1% reference resistor (RREF) laid between RTERM and GND.
10 SPI_MISO input SPI interface: master-in / slave-out from the external SPI flash holding firmware.
11 SPI_MOSI output SPI interface: master-out / slave-in to the external SPI flash holding firmware.
12 SPI_CK output SPI interface clock driven to the external SPI flash.
13 SPI_CS output SPI interface chip select (active-low) to the external SPI flash.
14 LED output Memory card access indicator LED driver output. Programmable behavior; can also be repurposed as a read-only status option.
15 VBUS power_in 5 V power source from the USB VBUS rail. Feeds the on-chip 5 V→3.3 V regulator.
16 DVDD33 power_in Digital 3.3 V power source for the core digital I/O. Decouple locally to GND.
17 DVDD12 power_in Digital 1.2 V power source for the core logic. Supplied from the on-chip 3.3 V→1.2 V regulator.
18 SD_D1 bidirectional SD/MMC card data bit 1 (memory card interface).
19 SD_D0 bidirectional SD/MMC card data bit 0 (memory card interface).
20 SD_CK output SD/MMC card clock output driven to the memory card.
21 SD_CM bidirectional SD/MMC card command/response line. Has an internal pull-up when configured as input.
22 SD_D3 bidirectional SD/MMC card data bit 3 (memory card interface).
23 SD_D2 bidirectional SD/MMC card data bit 2 (memory card interface).
24 VUHSI power_out SD 3.0 UHS-I IO pad power rail. Sourced from the GL3224 internal regulator; no external power input is required, only local decoupling.
25 DVDD33 power_in Digital 3.3 V power source (second DVDD33 pin). Tie together with pin 16.
26 SD_VCC power_out SD card VCC output. Driven through the on-chip power MOSFET to supply the SD/MMC card socket.
27 GND power_in Device ground. The exposed die pad on the QFN underside must also be soldered to ground.
28 SD_WP input SD write-protect sense input. 0 = write enable, 1 = write protected. Internal pull-up when input.
29 SD_CDZ input SD card-detect input (active-low). 0 = card inserted, 1 = no card. Internal pull-up when input.
30 AVDD33 power_in Analog 3.3 V power source (second AVDD33 pin). Tie together with pin 8 and decouple locally.
31 DM bidirectional USB 2.0 high-speed / full-speed differential data minus (D-).
32 DP bidirectional USB 2.0 high-speed / full-speed differential data plus (D+).
EP GND power_in Exposed die pad on the QFN underside. Must be connected to system ground for electrical return and thermal dissipation.

Key specifications

Parameter Value
Manufacturer Genesys Logic
Package QFN-32-EP(5x5)
Category Interface
Pins 33

Ordering variants

Same part, different packaging or reel option.

  • GL3224-OIY04OIYXX
  • GL3224-OIY04
  • GL3224-OIY04ONYXX

CAD (KiCad official)

  • Symbol: GL3224-OIY04
  • Footprint: Package_DFN_QFN:QFN-32-1EP_5x5mm_P0.5mm_EP3.3x3.3mm
  • 3D model: QFN-32-EP(5x5) (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Genesys Logic datasheet (25 pp, sha256 d31d18e13a3e5160, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF