GD32F103C8T6 from GigaDevice Semicon Beijing, in a LQFP-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	VBAT	power_in	Backup domain supply, 1.8-3.6 V. Powers the RTC, LXTAL oscillator and backup registers when VDD is removed. Tie to VDD when battery back-up is not used.
2	PC13-TAMPER-RTC	bidirectional	GPIO PC13 powered from the backup domain. Alternate function: TAMPER-RTC (RTC tamper detect / RTC alarm / second output). Limited drive current when supplied from VBAT.
3	PC14-OSC32IN	bidirectional	GPIO PC14 / low-speed external 32.768 kHz crystal input (OSC32IN). Configure as OSC32IN when the LXTAL oscillator is enabled for the RTC.
4	PC15-OSC32OUT	bidirectional	GPIO PC15 / low-speed external 32.768 kHz crystal output (OSC32OUT). Configure as OSC32OUT when the LXTAL oscillator is enabled.
5	OSCIN	input	High-speed external crystal/resonator input (HXTAL, 4-32 MHz) or external clock input for the main PLL.
6	OSCOUT	output	High-speed external crystal drive output (HXTAL). Leave floating when using an external single-ended clock into OSCIN.
7	NRST	bidirectional	Active-low bidirectional device reset. Driven low internally for POR/BOR/watchdog resets; a typical 100 nF cap to VSS is recommended.
8	VSSA	power_in	Analog ground reference for ADC, DAC and analog reference. Tie to the board analog ground; typically joined to VSS at a single point.
9	VDDA	power_in	Analog supply for ADC, DAC and reset/PVD block, 2.0-3.6 V (min 2.4 V for ADC use). Decouple locally with 100 nF plus 1 uF.
10	PA0-WKUP	bidirectional	GPIO PA0. Alternate functions: WKUP (standby wake-up), USART1_CTS, ADC012_IN0, TIMER1_CH0, TIMER1_ETI.
11	PA1	bidirectional	GPIO PA1. Alternate functions: USART1_RTS, ADC012_IN1, TIMER1_CH1.
12	PA2	bidirectional	GPIO PA2. Alternate functions: USART1_TX, ADC012_IN2, TIMER1_CH2.
13	PA3	bidirectional	GPIO PA3. Alternate functions: USART1_RX, ADC012_IN3, TIMER1_CH3.
14	PA4	bidirectional	GPIO PA4. Alternate functions: SPI0_NSS, USART1_CK, ADC01_IN4.
15	PA5	bidirectional	GPIO PA5. Alternate functions: SPI0_SCK, ADC01_IN5.
16	PA6	bidirectional	GPIO PA6. Alternate: SPI0_MISO, ADC01_IN6, TIMER2_CH0. Remap: TIMER0_BRKIN.
17	PA7	bidirectional	GPIO PA7. Alternate: SPI0_MOSI, ADC01_IN7, TIMER2_CH1. Remap: TIMER0_CH0_ON.
18	PB0	bidirectional	GPIO PB0. Alternate: ADC01_IN8, TIMER2_CH2. Remap: TIMER0_CH1_ON.
19	PB1	bidirectional	GPIO PB1. Alternate: ADC01_IN9, TIMER2_CH3. Remap: TIMER0_CH2_ON.
20	PB2	bidirectional	GPIO PB2 / BOOT1 boot-mode selector strap (5 V tolerant). Sampled at reset together with BOOT0.
21	PB10	bidirectional	GPIO PB10 (5 V tolerant). Alternate: I2C1_SCL, USART2_TX. Remap: TIMER1_CH2.
22	PB11	bidirectional	GPIO PB11 (5 V tolerant). Alternate: I2C1_SDA, USART2_RX. Remap: TIMER1_CH3.
23	VSS_1	power_in	Digital ground (one of three VSS pins). Tie all VSS pins to the board ground plane.
24	VDD_1	power_in	Digital I/O supply, 2.0-3.6 V (one of three VDD pins). Decouple each VDD/VSS pair with a 100 nF capacitor and a shared 4.7 uF bulk.
25	PB12	bidirectional	GPIO PB12 (5 V tolerant). Alternate: SPI1_NSS, I2C1_SMBA, USART2_CK, TIMER0_BRKIN.
26	PB13	bidirectional	GPIO PB13 (5 V tolerant). Alternate: SPI1_SCK, USART2_CTS, TIMER0_CH0_ON.
27	PB14	bidirectional	GPIO PB14 (5 V tolerant). Alternate: SPI1_MISO, USART2_RTS, TIMER0_CH1_ON.
28	PB15	bidirectional	GPIO PB15 (5 V tolerant). Alternate: SPI1_MOSI, TIMER0_CH2_ON.
29	PA8	bidirectional	GPIO PA8 (5 V tolerant). Alternate: USART0_CK, TIMER0_CH0, CK_OUT0 (MCO clock output).
30	PA9	bidirectional	GPIO PA9 (5 V tolerant). Alternate: USART0_TX, TIMER0_CH1.
31	PA10	bidirectional	GPIO PA10 (5 V tolerant). Alternate: USART0_RX, TIMER0_CH2.
32	PA11	bidirectional	GPIO PA11 (5 V tolerant). Alternate: USART0_CTS, CAN0_RX, USBDM (USB D-), TIMER0_CH3.
33	PA12	bidirectional	GPIO PA12 (5 V tolerant). Alternate: USART0_RTS, CAN0_TX, TIMER0_ETI, USBDP (USB D+).
34	PA13	bidirectional	SWDIO / JTMS by default (SW-DP and JTAG data line). Remap to PA13 GPIO by releasing the debug port through AFIO.
35	VSS_2	power_in	Digital ground (one of three VSS pins).
36	VDD_2	power_in	Digital I/O supply, 2.0-3.6 V (one of three VDD pins).
37	PA14	bidirectional	SWCLK / JTCK by default (SW-DP and JTAG clock line). Remap to PA14 GPIO when the debug port is released.
38	PA15	bidirectional	JTDI by default (5 V tolerant). Remap options: TIMER1_CH0, TIMER1_ETI, PA15 GPIO, SPI0_NSS.
39	PB3	bidirectional	JTDO by default (5 V tolerant). Remap options: PB3 GPIO, TIMER1_CH1, SPI0_SCK.
40	PB4	bidirectional	NJTRST by default (5 V tolerant). Remap options: TIMER2_CH0, PB4 GPIO, SPI0_MISO.
41	PB5	bidirectional	GPIO PB5 (not 5 V tolerant). Alternate: I2C0_SMBA. Remap: TIMER2_CH1, SPI0_MOSI.
42	PB6	bidirectional	GPIO PB6 (5 V tolerant). Alternate: I2C0_SCL, TIMER3_CH0. Remap: USART0_TX.
43	PB7	bidirectional	GPIO PB7 (5 V tolerant). Alternate: I2C0_SDA, TIMER3_CH1. Remap: USART0_RX.
44	BOOT0	input	Boot mode selection strap sampled at reset. Together with BOOT1 (PB2) selects boot from main flash, system-memory bootloader, or embedded SRAM.
45	PB8	bidirectional	GPIO PB8 (5 V tolerant). Alternate: TIMER3_CH2. Remap: I2C0_SCL, CAN0_RX.
46	PB9	bidirectional	GPIO PB9 (5 V tolerant). Alternate: TIMER3_CH3. Remap: I2C0_SDA, CAN0_TX.
47	VSS_3	power_in	Digital ground (one of three VSS pins).
48	VDD_3	power_in	Digital I/O supply, 2.0-3.6 V (one of three VDD pins).

Key specifications

Parameter	Value
Manufacturer	GigaDevice Semicon Beijing
Package	LQFP-48(7x7)
Category	MCU
Pins	48

Ordering variants

Same part, different packaging or reel option.

GD32F103C8T6
GD32F103CBT6
GD32F103C6T6
GD32F103C4T6
GD32F103T8U6
GD32F103TBU6
GD32F103T6U6
GD32F103T4U6
GD32F103R8T6
GD32F103RBT6
GD32F103RCT6
GD32F103RDT6
GD32F103RET6
GD32F103RFT6
GD32F103RGT6
GD32F103RIT6
GD32F103RKT6
GD32F103V8T6
GD32F103VBT6
GD32F103VCT6
GD32F103VDT6
GD32F103VET6
GD32F103ZCT6
GD32F103ZDT6
GD32F103ZET6
GD32F103ZFT6
GD32F103ZGT6
GD32F103ZIT6
GD32F103ZKT6

CAD (KiCad official)

Symbol: GD32F103C8T6
Footprint: Package_QFP:LQFP-48_7x7mm_P0.5mm
3D model: LQFP-48(7x7) (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File	Size	Use it when
`gd32f103c8t6.step`	617 KB	You want the bare part, or you mark your own boards.
`gd32f103c8t6-etched.step`	4.8 MB	You want the part with `GD32F103C8T6` already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 1181 faces against 747 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: GigaDevice Semicon Beijing datasheet (112 pp, sha256 53da1a17a1523e83, retrieved 2026-08-17, tier: lcsc)
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF