GD25Q80ESIG from GigaDevice Semicon Beijing, in a SOP-8-208mil. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	CS#	input	Chip Select input (active low). Must be driven high when the device is not selected; do not leave floating after power-up. Enables the SPI/Dual-SPI/Quad-SPI interface when driven low.
2	SO/IO1	bidirectional	Serial Data Output in Standard SPI (SO); becomes bidirectional data line IO1 in Dual/Quad SPI modes. Data shifts on the falling edge of SCLK in standard SPI output mode.
3	WP#/IO2	bidirectional	Write Protect input (active low) in Standard/Dual SPI, protects the Block Protect and SRP bits when low. Becomes bidirectional data line IO2 in Quad SPI mode when the non-volatile Quad Enable (QE) bit in the Status Register is set to 1.
4	VSS	power_in	Ground reference for the device (0 V).
5	SI/IO0	bidirectional	Serial Data Input in Standard SPI (SI); becomes bidirectional data line IO0 in Dual/Quad SPI modes. Data is latched on the rising edge of SCLK.
6	SCLK	input	Serial Clock input. Supports up to 133 MHz for fast read with 30 pF load. Provides the timing for all serial input/output; SPI modes 0 and 3 are supported.
7	HOLD#/IO3	bidirectional	HOLD input (active low) when QE=0, pauses serial communication without deselecting the device. Becomes bidirectional data line IO3 in Quad SPI mode when QE=1.
8	VCC	power_in	Power supply input. Full operating voltage range 2.7 V to 3.6 V. Typical standby current 11 uA; typical deep-power-down current 1 uA.

Key specifications

Parameter	Value
Manufacturer	GigaDevice Semicon Beijing
Package	SOP-8-208mil
Category	Memory
Pins	8

Ordering variants

Same part, different packaging or reel option.

GD25Q80ESIG
GD25Q80ESIGSJG
GD25Q80ESIGSEG
GD25Q80ESIGSFG
GD25Q80ESIGTIG
GD25Q80ESIGTJG
GD25Q80ESIGTEG
GD25Q80ESIGTFG
GD25Q80ESIGEIG
GD25Q80ESIGEJG
GD25Q80ESIGEEG
GD25Q80ESIGEFG
GD25Q80ESIGNIG
GD25Q80ESIGNJG
GD25Q80ESIGNEG
GD25Q80ESIGNFG
GD25Q80ESIGWIG
GD25Q80ESIGWJG
GD25Q80ESIGWEG
GD25Q80ESIGWFG

CAD (KiCad official)

Symbol: GD25Q80ESIG
Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
3D model: SOP-8-208mil (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File	Size	Use it when
`gd25q80esig.step`	122 KB	You want the bare part, or you mark your own boards.
`gd25q80esig-etched.step`	2.7 MB	You want the part with `GD25Q80ESIG` already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 632 faces against 147 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: GigaDevice Semicon Beijing datasheet (56 pp, sha256 d73ddac270234097, retrieved 2026-08-17, tier: lcsc)
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF