GD25Q64ESIGR from GigaDevice Semicon Beijing, in a SOP-8-208mil. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	CS#	input	Chip Select input, active low. Must be driven high when the chip is not selected; do not leave floating after power-on. Enables/disables device serial communications.
2	SO/IO1	bidirectional	Serial Data Output in Standard SPI mode. Acts as bidirectional Data Input/Output 1 (IO1) in Dual and Quad SPI modes.
3	WP#/IO2	bidirectional	Active-low Write Protect input in Standard/Dual SPI (hardware-protects the Block Protect bits BP4-BP0 and SRP0/SRP1). Becomes bidirectional Data I/O 2 (IO2) in Quad SPI mode when QE=1 in the Status Register.
4	VSS	power_in	Ground reference for all signals and power supply.
5	SI/IO0	bidirectional	Serial Data Input in Standard SPI mode. Acts as bidirectional Data Input/Output 0 (IO0) in Dual and Quad SPI modes. Input data is latched on the rising edge of SCLK.
6	SCLK	input	Serial Clock input. Provides the timing of the serial interface; supports SPI modes 0 and 3, up to 133MHz for fast read.
7	HOLD#/IO3	bidirectional	Active-low HOLD input in Standard/Dual SPI mode (pauses serial communication without deselecting the device). Becomes bidirectional Data I/O 3 (IO3) in Quad SPI mode when QE=1.
8	VCC	power_in	Power supply input, single supply 2.7V to 3.6V. Typical standby current 12uA; deep power-down current ~1uA.

Key specifications

Parameter	Value
Manufacturer	GigaDevice Semicon Beijing
Package	SOP-8-208mil
Category	Memory
Pins	8

Ordering variants

Same part, different packaging or reel option.

GD25Q64ESIGR
GD25Q64ESIGT
GD25Q64ESIGY
GD25Q64ESIGRESJG
GD25Q64ESIGRESEG
GD25Q64ESIGRESFG
GD25Q64ESIGRETIG
GD25Q64ESIGRETJG
GD25Q64ESIGRETEG
GD25Q64ESIGRETFG
GD25Q64ESIGRENIG
GD25Q64ESIGRENJG
GD25Q64ESIGRENEG
GD25Q64ESIGRENFG
GD25Q64ESIGREQIG
GD25Q64ESIGREQJG
GD25Q64ESIGREQEG
GD25Q64ESIGREQFG
GD25Q64ESIGREWIG
GD25Q64ESIGREWJG
GD25Q64ESIGREWEG
GD25Q64ESIGREWFG
GD25Q64ESIGREYIG
GD25Q64ESIGREYJG
GD25Q64ESIGREYEG
GD25Q64ESIGREYFG
GD25Q64ESIGREFIG
GD25Q64ESIGREFJG
GD25Q64ESIGREFEG
GD25Q64ESIGREFFG
GD25Q64ESIGREZIG
GD25Q64ESIGREZJG
GD25Q64ESIGREZEG
GD25Q64ESIGREZFG
GD25Q64ESIGREBIG
GD25Q64ESIGREBJG
GD25Q64ESIGREBEG
GD25Q64ESIGREBFG

CAD (KiCad official)

Symbol: GD25Q64ESIGR
Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
3D model: SOP-8-208mil (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File	Size	Use it when
`gd25q64esigr.step`	122 KB	You want the bare part, or you mark your own boards.
`gd25q64esigr-etched.step`	2.7 MB	You want the part with `GD25Q64ESIGR` already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 644 faces against 147 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: GigaDevice Semicon Beijing datasheet (62 pp, sha256 578950858fdf4572, retrieved 2026-08-17, tier: lcsc)
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF