GD25Q32ETIGR from GigaDevice Semicon Beijing, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	CS#	input	Active-low chip select input. Must be driven high to deselect the device and low to enable serial communication. Must not be left floating after power-on.
2	SO (IO1)	bidirectional	Serial Data Output in standard SPI mode; becomes bidirectional data I/O bit 1 (IO1) in Dual and Quad SPI modes. Data shifts out on the falling edge of SCLK.
3	WP# (IO2)	bidirectional	Active-low Write Protect input in standard/Dual SPI mode; protects the Block Protect (BP4-BP0) and SRP bits when driven low. Becomes bidirectional data I/O bit 2 (IO2) in Quad SPI mode (requires QE=1 in the Status Register).
4	VSS	power_in	Device ground reference.
5	SI (IO0)	bidirectional	Serial Data Input in standard SPI mode; becomes bidirectional data I/O bit 0 (IO0) in Dual and Quad SPI modes. Input data is latched on the rising edge of SCLK.
6	SCLK	input	Serial clock input. Provides the timing reference for all serial input and output operations; supports SPI mode 0 and mode 3 at up to 133MHz with a 30pF load.
7	HOLD# (IO3)	bidirectional	Active-low Hold input that pauses serial communication without deselecting the device (when QE=0). Becomes bidirectional data I/O bit 3 (IO3) in Quad SPI mode when QE=1.
8	VCC	power_in	Positive supply voltage input. Full operating range 2.7V to 3.6V.

Key specifications

Parameter	Value
Manufacturer	GigaDevice Semicon Beijing
Package	SOP-8
Category	Memory
Pins	8

Ordering variants

Same part, different packaging or reel option.

GD25Q32ETIGR
GD25Q32ETIGRETJG
GD25Q32ETIGRETEG
GD25Q32ETIGRETFG
GD25Q32ETIGRESIG
GD25Q32ETIGRESJG
GD25Q32ETIGRESEG
GD25Q32ETIGRESFG
GD25Q32ETIGREEIG
GD25Q32ETIGREEJG
GD25Q32ETIGREEEG
GD25Q32ETIGREEFG
GD25Q32ETIGRENIG
GD25Q32ETIGRENJG
GD25Q32ETIGRENEG
GD25Q32ETIGRENFG
GD25Q32ETIGREWIG
GD25Q32ETIGREWJG
GD25Q32ETIGREWEG
GD25Q32ETIGREWFG
GD25Q32ETIGREBIG
GD25Q32ETIGREBJG
GD25Q32ETIGREBEG
GD25Q32ETIGREBFG

CAD (KiCad official)

Symbol: GD25Q32ETIGR
Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
3D model: SOP-8 (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File	Size	Use it when
`gd25q32etigr.step`	122 KB	You want the bare part, or you mark your own boards.
`gd25q32etigr-etched.step`	2.6 MB	You want the part with `GD25Q32ETIGR` already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 624 faces against 147 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: GigaDevice Semicon Beijing datasheet (59 pp, sha256 f7b7ab327ffd9a02, retrieved 2026-08-17, tier: lcsc)
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF