GD25Q16EEIGR from GigaDevice Semicon Beijing, in a USON-8(2x3). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	CS#	input	Active-low Chip Select input. Drives the SPI transaction: falling edge starts a command, rising edge terminates it. Must be driven high when the device is not selected; do not leave floating.
2	SO/IO1	bidirectional	Standard SPI serial data output (SO). In Dual and Quad SPI modes this pin becomes bidirectional I/O line IO1. Data is shifted out on the falling edge of SCLK.
3	WP#/IO2	bidirectional	Active-low Write Protect input; when low, protects the Block Protect bits (BP4-BP0) and SRP bits from being modified. In Quad SPI mode this pin becomes bidirectional data line IO2 (requires Quad Enable QE=1 in Status Register). Must be driven high or pulled up if unused.
4	VSS	power_in	Device ground reference. Connect to the system 0 V rail with a short, low-impedance return.
5	SI/IO0	bidirectional	Standard SPI serial data input (SI). In Dual and Quad SPI modes this pin becomes bidirectional I/O line IO0. Input data is latched on the rising edge of SCLK.
6	SCLK	input	Serial Clock input. Provides the timing reference for the SPI bus; supports SPI modes 0 and 3. Maximum 133 MHz for fast-read operations with 30 pF load.
7	HOLD#/IO3	bidirectional	Active-low HOLD input when QE=0: pausing serial communication without deselecting the chip. When Quad Enable (QE=1) this pin becomes bidirectional data line IO3. Must be driven high or pulled up if unused.
8	VCC	power_in	Single-supply power input, 2.7 V to 3.6 V. Decouple locally with a 100 nF ceramic capacitor close to the pin.

Key specifications

Parameter	Value
Manufacturer	GigaDevice Semicon Beijing
Package	USON-8(2x3)
Category	Memory
Pins	8

Ordering variants

Same part, different packaging or reel option.

GD25Q16EEIGR
GD25Q16EEIGREEIS
GD25Q16EEIGREEJG
GD25Q16EEIGREEJS
GD25Q16EEIGREEEG
GD25Q16EEIGREEES
GD25Q16EEIGREEFG
GD25Q16EEIGREEFS
GD25Q16EEIGRETIG
GD25Q16EEIGRETIS
GD25Q16EEIGRETJG
GD25Q16EEIGRETJS
GD25Q16EEIGRETEG
GD25Q16EEIGRETES
GD25Q16EEIGRETFG
GD25Q16EEIGRETFS
GD25Q16EEIGRESIG
GD25Q16EEIGRESIS
GD25Q16EEIGRESJG
GD25Q16EEIGRESJS
GD25Q16EEIGRESEG
GD25Q16EEIGRESES
GD25Q16EEIGRESFG
GD25Q16EEIGRESFS
GD25Q16EEIGRENIG
GD25Q16EEIGRENIS
GD25Q16EEIGRENJG
GD25Q16EEIGRENJS
GD25Q16EEIGRENEG
GD25Q16EEIGRENES
GD25Q16EEIGRENFG
GD25Q16EEIGRENFS
GD25Q16EEIGREQIG
GD25Q16EEIGREQIS
GD25Q16EEIGREQJG
GD25Q16EEIGREQJS
GD25Q16EEIGREQEG
GD25Q16EEIGREQES
GD25Q16EEIGREQFG
GD25Q16EEIGREQFS
GD25Q16EEIGREWIG
GD25Q16EEIGREWIS
GD25Q16EEIGREWJG
GD25Q16EEIGREWJS
GD25Q16EEIGREWEG
GD25Q16EEIGREWES
GD25Q16EEIGREWFG
GD25Q16EEIGREWFS

CAD (KiCad official)

Symbol: GD25Q16EEIGR
Footprint: Package_SON:Winbond_USON-8-1EP_3x2mm_P0.5mm_EP0.2x1.6mm
3D model: USON-8(2x3) (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File	Size	Use it when
`gd25q16eeigr.step`	106 KB	You want the bare part, or you mark your own boards.
`gd25q16eeigr-etched.step`	2.2 MB	You want the part with `GD25Q16EEIGR` already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 536 faces against 62 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: GigaDevice Semicon Beijing datasheet (58 pp, sha256 cde85a649968cd40, retrieved 2026-08-17, tier: lcsc)
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF