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ft64f0a5-trb

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by Ray

FMD Fremont Micro Devices Microcontrollers (MCU/MPU/SOC), TSSOP-20. Datasheet-verified pinout, KiCad symbol/footprint/3D.

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README

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FT64F0A5-TRB

FMD Fremont Micro Devices · Microcontrollers (MCU/MPU/SOC) · TSSOP-20

FT64F0A5-TRB from FMD Fremont Micro Devices, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PA5/LVDOUT/TIM2_CH1/UART1_CK/OP0P bidirectional GPIO PA5. Alt: LVDOUT (LVD level output), TIM2 PWM channel 1, UART1 synchronous-mode clock output, OP0 op-amp non-inverting input.
2 PA6/AN3/UART1_TX/OP0N/[AT0] bidirectional GPIO PA6. Alt: ADC input channel AN3, UART1 TX data output, OP0 op-amp inverting input, internal test pin AT0.
3 PA7/AN4/[CLKO]/[TIM1_CH4]/UART1_RX/ELVD0/OP0OUT/[AT1]/[UART2_TX] bidirectional GPIO PA7. Alt: ADC input AN4, internal clock output CLKO (remap), TIM1 PWM CH4 (remap), UART1 RX input, external LVD input ELVD0, OP0 op-amp output, internal test AT1, UART2 TX (remap).
4 PC0/AN5/MCLRB/TIM1_CH1N/ELVD1 bidirectional GPIO PC0. Alt: ADC input AN5, external master reset MCLRB (active low), TIM1 PWM CH1 complementary output, external LVD input ELVD1.
5 PC1/OSC1/[SPI_MISO]/ELVD2 bidirectional GPIO PC1. Alt: crystal oscillator input OSC1, SPI MISO (remap), external LVD input ELVD2.
6 PB7/OSC2/[SPI_MOSI]/ELVD3 bidirectional GPIO PB7. Alt: crystal oscillator output OSC2, SPI MOSI (remap), external LVD input ELVD3.
7 GND power_in Ground reference (0 V).
8 PB6/AN6/I2C_SDA/[UART1_TX]/ISPDAT bidirectional GPIO PB6. Alt: ADC input AN6, I2C SDA data line, UART1 TX (remap), ISP programming data ISPDAT.
9 VDD power_in Main supply voltage. Operating range 1.9-5.5 V (8 MHz at >=1.9 V, 16 MHz at >=2.7 V, IAP at >=2.7 V).
10 PB5/[LVDOUT]/TIM2_CH3/SPI_NSS/UART2_RX bidirectional GPIO PB5. Alt: LVDOUT (remap), TIM2 PWM channel 3, SPI slave-select NSS, UART2 RX data input.
11 PB4/[LVDOUT]/I2C_SDA/TIM1_BKIN/UART2_TX bidirectional GPIO PB4. Alt: LVDOUT (remap), I2C SDA data line, TIM1 brake input, UART2 TX data output.
12 PB3/[LVDOUT]/I2C_SCL/[ADC_ETR]/TIM1_ETR/UART2_CK bidirectional GPIO PB3. Alt: LVDOUT (remap), I2C SCL clock, ADC external trigger (remap), TIM1 external trigger, UART2 synchronous clock.
13 PB2/TIM1_CH3/[SPI_SCK]/[TIM1_CH1N] bidirectional GPIO PB2. Alt: TIM1 PWM channel 3, SPI clock SCK (remap), TIM1 PWM CH1 complementary output (remap).
14 PB1/AN0/TIM1_CH4/CLKO/TIM1_CH2N bidirectional GPIO PB1. Alt: ADC input AN0, TIM1 PWM channel 4 output, internal clock output CLKO, TIM1 PWM CH2 complementary output.
15 PB0/[TIM1_CH2]/SPI_CK/TIM1_CH3N/[TIM2_CH1] bidirectional GPIO PB0. Alt: TIM1 CH2 (remap), SPI clock, TIM1 PWM CH3 complementary output, TIM2 PWM CH1 (remap).
16 PA0/SPI_MOSI/TIM1_CH1/VREFN bidirectional GPIO PA0. Alt: SPI MOSI, TIM1 PWM channel 1, ADC external negative reference VREFN.
17 PA1/SPI_MISO/TIM1_CH2/VREFP bidirectional GPIO PA1. Alt: SPI MISO, TIM1 PWM channel 2, ADC external positive reference VREFP.
18 PA2/[TIM1_CH4]/[I2C_SCL]/[UART1_RX]/ISPCK bidirectional GPIO PA2. Alt: TIM1 CH4 (remap), I2C SCL (remap), UART1 RX (remap), ISP programming clock ISPCK.
19 PA3/AN1/[TIM2_CH3]/[UART2_TX] bidirectional GPIO PA3. Alt: ADC input AN1, TIM2 PWM CH3 (remap), UART2 TX (remap).
20 PA4/AN2/TIM2_CH2/ADC_ETR/[UART2_RX] bidirectional GPIO PA4. Alt: ADC input AN2, TIM2 PWM channel 2, ADC external trigger input, UART2 RX (remap).

Key specifications

Parameter Value
Manufacturer FMD Fremont Micro Devices
Package TSSOP-20
Category MCU
Pins 20

Ordering variants

  • FT64F0A5-TRBFT64F0A1-RB
  • FT64F0A5-TRBFT64F0AF-MRB
  • FT64F0A5-TRBFT64F0A3-RB
  • FT64F0A5-TRBFT64F0A5-RB
  • FT64F0A5-TRB
  • FT64F0A5-TRBFT64F0A5-NRT

CAD (KiCad official)

  • Symbol: FT64F0A5-TRB
  • Footprint: Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm
  • 3D model: TSSOP-20 (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
ft64f0a5-trb.step 267 KB You want the bare part, or you mark your own boards.
ft64f0a5-trb-etched.step 2.7 MB You want the part with FT64F0A5-TRB already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 701 faces against 327 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: FMD Fremont Micro Devices datasheet (282 pp, sha256 a62017cffcbf43ef, retrieved 2026-08-17, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

Symbol & Footprint

Schematic Symbol

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PCB Footprint

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