FT64F0A3-RB
Public Unreviewedby Ray
FMD Fremont Micro Devices Microcontrollers (MCU/MPU/SOC), SOP-16. Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
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markdownFT64F0A3-RB
FMD Fremont Micro Devices · Microcontrollers (MCU/MPU/SOC) · SOP-16
FT64F0A3-RB from FMD Fremont Micro Devices, in a SOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VDD | power_in | Positive supply input. Operating range 1.9-5.5 V (8 MHz @ VDD ≥ 1.9 V, 16 MHz @ VDD ≥ 2.7 V). |
| 2 | PB1/AN0/TIM1_CH4/CLKO/TIM1_CH2N | bidirectional | GPIO PB1 with muxed ADC channel 0 (AN0), TIM1 PWM channel 4 output, internal clock output (CLKO), and TIM1 PWM channel 2 inverted output (TIM1_CH2N). |
| 3 | PB2/TIM1_CH3/[SPI_SCK]/[TIM1_CH1N] | bidirectional | GPIO PB2 with muxed TIM1 PWM channel 3 output, remapped SPI clock (SPI_SCK), and remapped TIM1 PWM channel 1 inverted output (TIM1_CH1N). |
| 4 | PB4/[LVDOUT]/I2C_SDA/TIM1_BKIN/UART2_TX | bidirectional | GPIO PB4 with muxed LVD level output (remap), I2C data line (SDA), TIM1 brake input (TIM1_BKIN), and UART2 transmit output. |
| 5 | PB3/[LVDOUT]/I2C_SCL/[ADC_ETR]/TIM1_ETR/UART2_CK | bidirectional | GPIO PB3 with muxed LVD level output (remap), I2C clock (SCL), remapped ADC external trigger, TIM1 external trigger, and UART2 synchronous clock. |
| 6 | PB0/[TIM1_CH2]/SPI_SCK/TIM1_CH3N/[TIM2_CH1] | bidirectional | GPIO PB0 with muxed TIM1 PWM channel 2 output (remap), SPI clock (SPI_SCK), TIM1 PWM channel 3 inverted output (TIM1_CH3N), and remapped TIM2 PWM channel 1 output. |
| 7 | PA0/SPI_MOSI/TIM1_CH1/VREFN | bidirectional | GPIO PA0 with muxed SPI master-out/slave-in data, TIM1 PWM channel 1 output, and ADC external negative reference input (VREFN). |
| 8 | PA1/SPI_MISO/TIM1_CH2/VREFP | bidirectional | GPIO PA1 with muxed SPI master-in/slave-out data, TIM1 PWM channel 2 output, and ADC external positive reference input (VREFP). |
| 9 | PA2/[TIM1_CH4]/[I2C_SCL]/[UART1_RX]/ISPCK | bidirectional | GPIO PA2 with muxed TIM1 PWM channel 4 output (remap), I2C clock (remap), UART1 receive (remap), and ISP programming clock input (ISPCK). |
| 10 | PA4/AN2/TIM2_CH2/ADC_ETR/[UART2_RX] | bidirectional | GPIO PA4 with muxed ADC channel 2 (AN2), TIM2 PWM channel 2 output, ADC external trigger input, and remapped UART2 receive input. |
| 11 | PB6/AN6/I2C_SDA/[UART1_TX]/ISPDAT | bidirectional | GPIO PB6 with muxed ADC channel 6 (AN6), I2C data (SDA), remapped UART1 transmit, and ISP programming data I/O (ISPDAT). |
| 12 | PA6/AN3/UART1_TX/OP0N | bidirectional | GPIO PA6 with muxed ADC channel 3 (AN3), UART1 transmit output, and op-amp 0 inverting input (OP0N). |
| 13 | PA7/AN4/[CLKO]/[TIM1_CH4]/UART1_RX/ELVD0/OP0OUT/[AT0]/[UART2_TX] | bidirectional | GPIO PA7 with muxed ADC channel 4 (AN4), clock output (remap), TIM1 PWM channel 4 output (remap), UART1 receive, external LVD detect input 0, op-amp 0 output, internal test pin, and remapped UART2 transmit. |
| 14 | PC1/OSC1/[SPI_MISO]/ELVD2 | bidirectional | GPIO PC1 with muxed crystal oscillator input (OSC1), remapped SPI MISO, and external LVD detect input 2. Connect a crystal between OSC1/OSC2 when running from an external LP/XT/HS clock source. |
| 15 | PB7/OSC2/[SPI_MOSI]/ELVD3 | bidirectional | GPIO PB7 with muxed crystal oscillator output (OSC2), remapped SPI MOSI, and external LVD detect input 3. |
| 16 | GND | power_in | Ground reference (0 V) for supply and I/O. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | FMD Fremont Micro Devices |
| Package | SOP-16 |
| Category | MCU |
| Pins | 16 |
Ordering variants
Same part, different packaging or reel option.
FT64F0A3-RBFT64F0A3-RBFT61F0A3-RBFT64F0A1-RBFT64F0A3-RBFT61F0A1-RBFT64F0AF-MRBFT64F0A3-RBFT61F0AF-MRBFT64F0A5-RBFT64F0A3-RBFT61F0A5-RBFT64F0A5-TRBFT64F0A3-RBFT61F0A5-TRBFT64F0A5-NRTFT64F0A3-RBFT61F0A5-NRT
CAD (KiCad official)
- Symbol:
FT64F0A3-RB - Footprint:
Package_SO:SOIC-16_3.9x9.9mm_P1.27mm - 3D model: SOP-16 (KiCad packages3D, STEP)
3D model downloads
Two STEP files. Same geometry, different body top:
| File | Size | Use it when |
|---|---|---|
ft64f0a3-rb.step |
217 KB | You want the bare part, or you mark your own boards. |
ft64f0a3-rb-etched.step |
2.5 MB | You want the part with FT64F0A3-RB already on it. |
The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 644 faces against 267 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: FMD Fremont Micro Devices datasheet (282 pp, sha256
a62017cffcbf43ef, retrieved 2026-08-17, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).