Symbol & Footprint

Schematic Symbol

Open full view ↗

PCB Footprint

Open full view ↗
Contents

README

markdown

FT60F11F-MRB

FMD Fremont Micro Devices · Microcontrollers (MCU/MPU/SOC) · MSOP-10

FT60F11F-MRB from FMD Fremont Micro Devices, in a MSOP-10. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VDD power_in Positive supply input. Operating range 1.9-5.5 V (VDD >= 2.7 V required for 16 MHz operation).
2 OSC1/CLKI/PA7 bidirectional Multiplexed pin: crystal/resonator input (OSC1), external clock input (CLKI, CMOS), or general-purpose PORTA bit 7 (PA7) with input-change interrupt and weak pull-up/pull-down.
3 OSC2/CLKO/PA6 bidirectional Multiplexed pin: crystal/resonator output (OSC2), instruction clock output (CLKO; remapped to PC5 on E-revision silicon), or general-purpose PORTA bit 6 (PA6) with input-change interrupt and weak pull-up/pull-down.
4 [P1B]/ELVD/MCLRB/PA5 bidirectional Multiplexed pin: remapped PWM1B output ([P1B]), external LVD analog input (ELVD), active-low external reset (MCLRB, with internal pull-up), or general-purpose PORTA bit 5 (PA5) with input-change interrupt.
5 P1B/PA4 bidirectional Multiplexed pin: default PWM1B output (P1B), or general-purpose PORTA bit 4 (PA4) with input-change interrupt and weak pull-up/pull-down. Source/sink capability 8/31 mA.
6 PC5/P1A0 bidirectional Multiplexed pin: general-purpose PORTC bit 5 (PC5) with weak pull-up/pull-down, or PWM1A0 output (P1A0). On E-revision devices this pin also carries the CLKO instruction-clock output. Source/sink capability 8/31 mA.
7 PA2/T0CKI/INT/[P1C]/BK0 bidirectional Multiplexed pin: PORTA bit 2 (PA2) with input-change interrupt and weak pull-up/pull-down, Timer0 external clock input (T0CKI), external interrupt input (INT), remapped PWM1C output ([P1C]), or PWM brake input (BK0).
8 PA1/ISCPDAT bidirectional In-system programming / on-chip debug data pin (ISCPDAT), doubling as general-purpose PORTA bit 1 (PA1) with input-change interrupt and weak pull-up/pull-down.
9 PA0/ISCPCLK bidirectional In-system programming / on-chip debug clock pin (ISCPCLK), doubling as general-purpose PORTA bit 0 (PA0) with input-change interrupt and weak pull-up/pull-down.
10 GND power_in Negative supply / ground reference.

Key specifications

Parameter Value
Manufacturer FMD Fremont Micro Devices
Package MSOP-10
Category MCU
Pins 10

Ordering variants

Same part, different packaging or reel option.

  • FT60F11F-MRB
  • FT60F111-RB
  • FT60F112-RB
  • FT60F112A-RB

CAD (KiCad official)

  • Symbol: FT60F11F-MRB
  • Footprint: Package_SO:MSOP-10_3x3mm_P0.5mm
  • 3D model: MSOP-10 (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
ft60f11f-mrb.step 148 KB You want the bare part, or you mark your own boards.
ft60f11f-mrb-etched.step 2.1 MB You want the part with FT60F11F-MRB already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 549 faces against 177 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: FMD Fremont Micro Devices datasheet (105 pp, sha256 9f8acb80b8551ef5, retrieved 2026-08-17, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF