component
FT232RL
Public Unreviewedby adom
FTDI USB-to-UART bridge, SSOP-28. USB 2.0 full-speed, 300 baud-3 Mbaud, integrated clock + EEPROM. Datasheet-verified.
3D Model
Open in new tab ↗
Symbol & Footprint
Schematic Symbol
Open full view ↗PCB Footprint
Open full view ↗Datasheet
Open in new tab ↗README
markdownFT232RL
FTDI · USB-to-UART bridge · SSOP-28
USB-to-serial UART interface IC in an SSOP-28 package, with integrated clock generation, EEPROM, USB termination, and configurable CBUS I/O, so it needs no external crystal or EEPROM. It bridges a host USB 2.0 full-speed port to a TTL UART at 300 baud to 3 Mbaud, with 128-byte RX and 256-byte TX FIFOs and bus- or self-powered operation. An on-chip 3.3 V level converter drives the UART I/O at 1.8-5 V. The classic no-fuss programmer/console adapter.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | TXD | output | Transmit Asynchronous Data Output (UART TXD). |
| 2 | DTR# | output | Data Terminal Ready control output / handshake signal (active low). |
| 3 | RTS# | output | Request To Send control output / handshake signal (active low). |
| 4 | VCCIO | power_in | +1.8V to +5.25V supply for the UART interface and CBUS group pins. Connect to 3V3OUT for +3.3V CMOS drive, to VCC for +5V CMOS drive, or to an external +1.8V–+2.8V rail for lower-level drive. |
| 5 | RXD | input | Receiving Asynchronous Data Input (UART RXD). |
| 6 | RI# | input | Ring Indicator control input (active low). When remote wake-up is enabled in the EEPROM, a 20 ms active-low pulse can resume the PC USB host from suspend. |
| 7 | GND | power_in | Device digital ground supply pin. |
| 8 | NC | unconnected | No internal connection. Leave unconnected. |
| 9 | DSR# | input | Data Set Ready control input / handshake signal (active low). |
| 10 | DCD# | input | Data Carrier Detect control input (active low). |
| 11 | CTS# | input | Clear To Send control input / handshake signal (active low). |
| 12 | CBUS4 | bidirectional | Configurable CBUS output-only pin. Function is set in the internal EEPROM. Factory default is SLEEP#. See CBUS Signal Options (Table 3.9). |
| 13 | CBUS2 | bidirectional | Configurable CBUS I/O pin. Function set in internal EEPROM. Factory default is TXDEN. See CBUS Signal Options (Table 3.9). |
| 14 | CBUS3 | bidirectional | Configurable CBUS I/O pin. Function set in internal EEPROM. Factory default is PWREN# (use with a 10kΩ pull-up resistor). See CBUS Signal Options (Table 3.9). |
| 15 | USBDP | bidirectional | USB Data Signal Plus (D+). Incorporates internal series resistor and 1.5kΩ pull-up resistor to +3.3V (from 3V3OUT). |
| 16 | USBDM | bidirectional | USB Data Signal Minus (D-). Incorporates internal series resistor. |
| 17 | 3V3OUT | power_out | +3.3V output from the integrated LDO regulator. Decouple with a 100 nF capacitor to ground. Supplies the internal USB transceiver and 1.5kΩ pull-up on USBDP. Up to 50 mA available to power external logic or supply VCCIO. |
| 18 | GND | power_in | Device digital ground supply pin. |
| 19 | RESET# | input | Active-low reset input. Can be driven by an external device to reset the FT232R. If not required, leave unconnected or pull up to VCC. |
| 20 | VCC | power_in | +3.3V to +5.25V supply to the device core. Minimum +4.0V (or VBUS=+5V) when using the internal clock; operation at +3.3V requires an external crystal oscillator. |
| 21 | GND | power_in | Device digital ground supply pin. |
| 22 | CBUS1 | bidirectional | Configurable CBUS I/O pin. Function set in internal EEPROM. Factory default is RXLED#. See CBUS Signal Options (Table 3.9). |
| 23 | CBUS0 | bidirectional | Configurable CBUS I/O pin. Function set in internal EEPROM. Factory default is TXLED#. See CBUS Signal Options (Table 3.9). |
| 24 | NC | unconnected | No internal connection. Leave unconnected. |
| 25 | AGND | power_in | Analog ground supply for the internal clock multiplier. |
| 26 | TEST | input | Puts the device into IC test mode. Must be tied to GND for normal operation, otherwise the device will appear to fail. |
| 27 | OSCI | input | Input for the 12 MHz oscillator cell. Optional — can be left unconnected when using the internal oscillator. |
| 28 | OSCO | output | Output from the 12 MHz oscillator cell. Optional — can be left unconnected when using the internal oscillator. |
Key specifications
| Parameter | Value |
|---|---|
| Type | USB 2.0 full-speed to UART bridge |
| Data rate | 300 baud to 3 Mbaud |
| Integrated | Clock generation, EEPROM, USB termination |
| CBUS I/O | 5 configurable pins |
| FIFO | 128 B RX / 256 B TX |
| I/O drive | 1.8-5 V CMOS (on-chip 3.3 V converter) |
| Power | Bus- or self-powered |
| Package | SSOP-28 |
| Body (L×W×H) | 10.2 × 5.3 × 1.75 mm |
Ordering variants
Same part, different packaging or reel option.
FT232RL-REEL (SSOP-28, tape & reel)
CAD (KiCad official)
- Symbol:
Interface_USB:FT232RL - Footprint:
Package_SO:SSOP-28_5.3x10.2mm_P0.65mm - 3D model: SSOP-28 (KiCad packages3D)
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: FTDI datasheet (43 pp, sha256
0f4e94f51a392d25, retrieved 2026-08-17, tier: cse) - Extractor:
ds2sf(Claude) — every pin and dimension is cited to a datasheet page; refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).