FSW7227YMS10G from Full Way, in a MSOP-10. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	VDD	power_in	Positive supply voltage input. Operating range 2.5V to 5.5V (typical 3.3V). Supply current ~0.6uA in disconnect (_EN=1) and ~33uA in connect (_EN=0).
2	SEL	input	Operation mode select input, 1.8V logic compatible (VIH ≥ 1.6V, VIL ≤ 0.5V). SEL=0 routes C0+/- to L0+/-; SEL=1 routes C0+/- to L1+/-. Internal ~6MΩ (2MΩ min) pull-down to ground; default state selects channel L0.
3	C0+	bidirectional	Signal I/O, common port (positive). One of the two USB 2.0 D+ common lines routed by the switch. Withstands up to DC 30V and ±30V IEC 61000-4-5 surge (OVP protected). Ron ~10Ω typical.
4	C0-	bidirectional	Signal I/O, common port (negative). One of the two USB 2.0 D- common lines routed by the switch. Withstands up to DC 30V and ±30V IEC 61000-4-5 surge (OVP protected). Ron ~10Ω typical.
5	GND	power_in	Power ground reference for the device.
6	L0-	bidirectional	Signal I/O, Channel 0 (negative). System-side D- of channel 0; connected to C0- when SEL=0 and _EN=0. Clamp voltage ~6.5V when C0- experiences a 10V event with RL=1kΩ.
7	L0+	bidirectional	Signal I/O, Channel 0 (positive). System-side D+ of channel 0; connected to C0+ when SEL=0 and _EN=0. Clamp voltage ~6.5V when C0+ experiences a 10V event with RL=1kΩ.
8	L1-	bidirectional	Signal I/O, Channel 1 (negative). System-side D- of channel 1; connected to C0- when SEL=1 and _EN=0. Clamp voltage ~6.5V when C0- experiences a 10V event with RL=1kΩ.
9	L1+	bidirectional	Signal I/O, Channel 1 (positive). System-side D+ of channel 1; connected to C0+ when SEL=1 and _EN=0. Clamp voltage ~6.5V when C0+ experiences a 10V event with RL=1kΩ.
10	~{EN}	input	Active-low enable input (chip disable when high), 1.8V logic compatible (VIH ≥ 1.6V, VIL ≤ 0.5V). _EN=1 powers down the switches (all channels Hi-Z); _EN=0 enables the selected channel. Internal ~6MΩ pull-down ensures the chip is enabled by default at power-on.

Key specifications

Parameter	Value
Manufacturer	Full Way
Package	MSOP-10
Category	Interface
Pins	10

Ordering variants

Same part, different packaging or reel option.

FSW7227YMS10G/TR
FSW7227YMS10GYUWQ10G/TR

CAD (KiCad official)

Symbol: FSW7227YMS10G
Footprint: Package_SO:MSOP-10_3x3mm_P0.5mm
3D model: MSOP-10 (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File	Size	Use it when
`fsw7227yms10g.step`	148 KB	You want the bare part, or you mark your own boards.
`fsw7227yms10g-etched.step`	2.5 MB	You want the part with `FSW7227YMS10G` already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 628 faces against 177 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Full Way datasheet (11 pp, sha256 273c425f623f6ef8, retrieved 2026-08-17, tier: lcsc)
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF