component
FM25V10-GTR
Public Unreviewedby Ray
Infineon FRAM, SOIC-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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README
markdownFM25V10-GTR
Infineon · FRAM · SOIC-8
FM25V10-GTR from Infineon, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | CS | input | Chip Select (active LOW). Activates the device; when HIGH the device enters low-power standby, ignores other inputs, and SO is tristated. A falling edge on CS must occur before every opcode. |
| 2 | SO | output | Serial Output (MISO). Data output pin, driven during a read and tristated at all other times including when HOLD is LOW. Data transitions on the falling edge of SCK. |
| 3 | WP | input | Write Protect (active LOW). Prevents write operations to the Status Register when WPEN=1. Must be tied to VDD if not used. |
| 4 | VSS | power_in | Ground for the device. Must be connected to system ground. |
| 5 | SI | input | Serial Input (MOSI). All data is input on this pin, sampled on the rising edge of SCK. Should always be driven to a valid logic level to meet IDD specifications. |
| 6 | SCK | input | Serial Clock. All I/O activity is synchronized to SCK; inputs latched on rising edge, outputs on falling edge. May be 0 to 40 MHz and may be interrupted at any time. |
| 7 | HOLD | input | HOLD pin (active LOW). Suspends the current memory operation so the host CPU can handle another task. Transitions on HOLD must occur while SCK is LOW. Has a weak internal pull-up; tie to VDD if not used. |
| 8 | VDD | power_in | Power supply input to the device. Operating range 2.0 V to 3.6 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Infineon |
| Package | SOIC-8 |
| Category | Memory |
| Pins | 8 |
Ordering variants
Same part, different packaging or reel option.
FM25V10-GTRGFM25V10-GTRFM25V10-GTRN-GFM25V10-GTRN-GTR
CAD (KiCad official)
- Symbol:
FM25V10-GTR - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
3D model downloads
Two STEP files. Same geometry, different body top:
| File | Size | Use it when |
|---|---|---|
fm25v10-gtr.step |
122 KB | You want the bare part, or you mark your own boards. |
fm25v10-gtr-etched.step |
2.0 MB | You want the part with FM25V10-GTR already on it. |
The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 499 faces against 147 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Infineon datasheet (24 pp, sha256
d2bfa7a3edd7a795, retrieved 2026-08-17, tier: lcsc) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).