Symbol & Footprint

Schematic Symbol

Open full view ↗

PCB Footprint

Open full view ↗
Contents

README

markdown

EUP3484DIR1

Eutech Microelectronics · DC-DC Converters · SOIC-8-EP

EUP3484DIR1 from Eutech Microelectronics, in a SOIC-8-EP. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 BS passive High-Side Gate Drive Boost Input. Supplies drive for the high-side N-Channel DMOS switch. Connect a 0.01μF (10nF) or greater bootstrap capacitor from SW to BS to power the high-side switch. Absolute maximum: VSW-0.3V to VSW+6V.
2 IN power_in Input Supply Pin. Supplies power to the IC and to the step-down converter switches. Drive IN with a 4.5V to 30V power source (abs max 35V). Bypass to GND with a suitably large capacitor to minimize input ripple.
3 SW power_out Power Switching Output. Connect the output LC filter (inductor to output capacitor) from SW to the load. Switch voltage range -1V to VIN+0.3V.
4 GND power_in Ground. Must be connected to the exposed thermal pad for proper operation. Connect the thermal pad to the PCB ground plane using multiple vias for good thermal performance.
5 FB input Output Feedback Input. Senses and regulates the output voltage. Drive FB with a resistive voltage divider from the output; feedback threshold is 0.925V (typ). VOUT = 0.925 × (R1+R2)/R2.
6 COMP output Loop Compensation Input/Error-Amplifier Output. Connect a series RC network from COMP to GND to compensate the regulation control loop.
7 EN input Enable Input. Logic input controlling on/off. Drive high to turn on, low to turn off. Do not leave floating; directly connect to IN (or through a resistance) for automatic startup. Disable threshold typ 1.5V; lockout threshold typ 2.5V; abs max -0.3V to 35V.
8 SS passive Soft-Start Control Input. Connect an external capacitor (e.g. 0.1μF) to program the soft-start ramp; charge current is typ 6μA. Leave open to use the internal soft-start function.
9 GND (Exposed Pad) power_in Exposed thermal pad on package underside. Electrically tied to GND (pin 4). Must be soldered to the PCB ground plane with multiple thermal vias for proper thermal and electrical performance (θJA ≈ 60°C/W).

Key specifications

Parameter Value
Manufacturer Eutech Microelectronics
Package SOIC-8-EP
Category PMIC
Pins 9

Ordering variants

Same part, different packaging or reel option.

  • EUP3484DIR1

CAD (KiCad official)

  • Symbol: EUP3484DIR1
  • Footprint: Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm
  • 3D model: SOIC-8-EP (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
eup3484dir1.step 125 KB You want the bare part, or you mark your own boards.
eup3484dir1-etched.step 2.3 MB You want the part with EUP3484DIR1 already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 574 faces against 152 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Eutech Microelectronics datasheet (11 pp, sha256 dfbdc2b02ce6086f, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF