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Contents

README

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ETA5055V180DS2F

etasolution · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-5

ETA5055V180DS2F from etasolution, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 IN power_in Input supply pin. Operating range 1.8V to 5.5V (absolute max -0.3V to 6V). Bypass with >=1uF ceramic capacitor to GND.
2 GND power_in Ground reference pin for the regulator.
3 EN input Enable pin. Drive high (>=0.9V) to enable the LDO, drive low (<=0.4V) to disable/shutdown. Shutdown current <=1uA. Do not float.
4 NC unconnected Not Connected. Leave floating or tie to GND.
5 OUT power_out Regulated output pin. Fixed 1.8V (this variant, XXX=180 voltage code), up to 500mA continuous. Requires >=1uF ceramic output capacitor to GND. Current limit typ 800mA, foldback 400mA on short.

Key specifications

Parameter Value
Manufacturer etasolution
Package SOT-23-5
Category PMIC
Pins 5

Ordering variants

Same part, different packaging or reel option.

  • ETA5055V180DS2F
  • ETA5055V180DS2FDD2G
  • ETA5055V180DS2FDD1E
  • ETA5055V180DS2FDF1E
  • ETA5055V180DS2FDCNE

CAD (KiCad official)

  • Symbol: ETA5055V180DS2F
  • Footprint: Package_TO_SOT_SMD:SOT-23-5
  • 3D model: SOT-23-5 (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: etasolution datasheet (13 pp, sha256 7fa1444ec8c38476, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF