ETA1652FSG
Public Unreviewedby Ray
etasolution DC-DC Converters, SOT-563. Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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README
markdownETA1652FSG
etasolution · DC-DC Converters · SOT-563
ETA1652FSG from etasolution, in a SOT-563. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | IN | power_in | Supply voltage input, 4.5V to 18V operating (absolute max 19V, can stand off up to 25V via OVP). Bypass with a 10µF ceramic capacitor to GND placed close to the pin. |
| 2 | SW | output | Switching node, inductor connection. Connect an inductor (typ. 2.2µH) between SW and the regulator output. Absolute max -0.3V to 19V. |
| 3 | GND | power_in | Device ground return for power and signal. Connect directly to the ground plane; the FB divider lower resistor R2 must return to this pin with a separate trace. |
| 4 | BST | passive | Bootstrap capacitor pin for the high-side MOSFET gate drive. Connect a 10nF ceramic capacitor from BST to SW. Absolute max -0.3V to SW+6V. |
| 5 | EN | input | Enable input. Drive high (>1.2V typ rising) to enable the regulator, low or floating (<1.1V typ falling) to shut down. Internal 1MΩ pulldown to GND; can be tied to IN for automatic startup. Absolute max 19V. |
| 6 | FB | input | Feedback input. Connect an external resistor divider from VOUT to FB and GND to set output voltage; internal reference is 0.806V typ. R2 (FB-to-GND) should be 1kΩ-20kΩ. Absolute max -0.3V to 6V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | etasolution |
| Package | SOT-563 |
| Category | PMIC |
| Pins | 6 |
Ordering variants
Same part, different packaging or reel option.
ETA1652FSG
CAD (KiCad official)
- Symbol:
ETA1652FSG - Footprint:
Package_TO_SOT_SMD:SOT-563 - 3D model: SOT-563 (KiCad packages3D, STEP)
3D model downloads
Two STEP files. Same geometry, different body top:
| File | Size | Use it when |
|---|---|---|
eta1652fsg.step |
448 KB | You want the bare part, or you mark your own boards. |
eta1652fsg-etched.step |
2.0 MB | You want the part with ETA1652FSG already on it. |
The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 426 faces against 54 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: etasolution datasheet (7 pp, sha256
35fed87ddf6b782d, retrieved 2026-08-17, tier: lcsc) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).