EG1192L from EG Micro, in a ESOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
0	VIN	power_in	Chip power-supply input tied to the exposed thermal pad on the backside of the package. Connect to the same net as pin 1 VIN (10 V to 100 V input range) and to the ground/thermal copper pour for heat dissipation.
1	VIN	power_in	Chip power-supply input. Wide-voltage range 10 V to 100 V; bypass with a low-ESR bulk capacitor and a 0.1 µF ceramic close to the pin.
2	GND	power_in	Device ground reference. Connect to the system ground plane; tie the exposed pad copper to this net for thermal performance.
3	EN	input	Enable input, active high - drives the switching converter on. Pulling EN low fully shuts down the chip for zero standby current.
4	VIA	output	Input-voltage sense/divider output. Internally the VIN rail is fed through a resistor divider (≈450 kΩ / 15 kΩ) and brought out here for input-voltage sampling by an external MCU/ADC.
5	FB	input	Output-voltage feedback input to the internal error amplifier (VREF ≈ 1.25 V). Connect through an external resistor divider from VOUT to program the output voltage.
6	VB	passive	Bootstrap (floating) supply for the high-side MOSFET gate driver. Connect a bootstrap capacitor (typ. 0.1 µF) between VB and VS.
7	VS	output	Switch node - floating ground reference for the high-side driver and drain of the freewheeling path. Connect to the external inductor and the anode of the freewheeling Schottky (e.g. SS310); return of the bootstrap capacitor.
8	IS	input	MOS peak current-limit sense input (VREF ≈ 0.18 V). Sets cycle-by-cycle over-current protection via an external sense resistor.

Key specifications

Parameter	Value
Manufacturer	EG Micro
Package	ESOP-8
Category	PMIC
Pins	9

CAD (KiCad official)

Symbol: EG1192L
Footprint: Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm
3D model: ESOP-8 (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File	Size	Use it when
`eg1192l.step`	255 KB	You want the bare part, or you mark your own boards.
`eg1192l-etched.step`	1.5 MB	You want the part with `EG1192L` already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 376 faces against 161 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: EG Micro datasheet (11 pp, sha256 3a8a9fa6494f7877, retrieved 2026-08-17, tier: lcsc)
Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF