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ea3058qdr
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Everanalog IC design DC-DC Converters, QFN-24-EP(4x4). Datasheet-verified pinout, KiCad symbol/footprint/3D.
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markdownEA3058QDR
Everanalog IC design · DC-DC Converters · QFN-24-EP(4x4)
EA3058QDR from Everanalog IC design, in a QFN-24-EP(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PGND3 | power_in | Power ground pin of CH3. Return path for CH3 buck regulator low-side MOSFET; connect directly to ground plane. |
| 2 | FB3 | input | Feedback input of CH3. Connect to CH3 output voltage via a resistor divider (VOUT = 0.6 × R1/R2 + 0.6V); reference voltage is 0.6V typical. |
| 3 | VCC | power_in | Input supply pin for the internal control circuit. Operating range 2.7V to 5.5V; typically bypassed with a 0.1uF ceramic capacitor to AGND. |
| 4 | AGND | power_in | Analog ground pin. Connect directly to the internal ground layer via a dedicated via for a clean reference. |
| 5 | FB2 | input | Feedback input of CH2. Connect to CH2 output voltage via a resistor divider (VOUT = 0.6 × R1/R2 + 0.6V); reference voltage is 0.6V typical. |
| 6 | PGND2 | power_in | Power ground pin of CH2. Return path for CH2 buck regulator low-side MOSFET; connect directly to ground plane. |
| 7 | LX2 | output | Internal MOSFET switching output of CH2. Connect to the LC low-pass filter (inductor + output capacitor) to obtain a stable DC output voltage; high dV/dt node. |
| 8 | VIN2 | power_in | Power input pin of CH2 buck converter (2.7V to 5.5V). Recommended to place a 10uF MLCC capacitor between VIN2 and PGND2. |
| 9 | EN2 | input | CH2 turn on/off control input. Do not leave floating; VIH ≥ 2V, VIL ≤ 0.4V. Can be RC-delayed for programmable soft-start timing. |
| 10 | EN1 | input | CH1 turn on/off control input. Do not leave floating; VIH ≥ 2V, VIL ≤ 0.4V. Can be RC-delayed for programmable soft-start timing. |
| 11 | VIN1 | power_in | Power input pin of CH1 buck converter (2.7V to 5.5V). Recommended to place a 10uF MLCC capacitor between VIN1 and PGND1. |
| 12 | LX1 | output | Internal MOSFET switching output of CH1. Connect to the LC low-pass filter (inductor + output capacitor) to obtain a stable DC output voltage; high dV/dt node. |
| 13 | PGND1 | power_in | Power ground pin of CH1. Return path for CH1 buck regulator low-side MOSFET; connect directly to ground plane. |
| 14 | FB1 | input | Feedback input of CH1. Connect to CH1 output voltage via a resistor divider (VOUT = 0.6 × R1/R2 + 0.6V); reference voltage is 0.6V typical. |
| 15 | FB4 | input | Feedback input of CH4. Connect to CH4 output voltage via a resistor divider (VOUT = 0.6 × R1/R2 + 0.6V); reference voltage is 0.6V typical. |
| 16 | PGND4 | power_in | Power ground pin of CH4. Return path for CH4 buck regulator low-side MOSFET; connect directly to ground plane. |
| 17 | NC | unconnected | No connect. Leave floating or tie to ground per PCB layout convenience. |
| 18 | NC | unconnected | No connect. Leave floating or tie to ground per PCB layout convenience. |
| 19 | LX4 | output | Internal MOSFET switching output of CH4. Connect to the LC low-pass filter (inductor + output capacitor) to obtain a stable DC output voltage; high dV/dt node. |
| 20 | VIN4 | power_in | Power input pin of CH4 buck converter (2.7V to 5.5V). Recommended to place a 10uF MLCC capacitor between VIN4 and PGND4. |
| 21 | EN4 | input | CH4 turn on/off control input. Do not leave floating; VIH ≥ 2V, VIL ≤ 0.4V. Can be RC-delayed for programmable soft-start timing. |
| 22 | EN3 | input | CH3 turn on/off control input. Do not leave floating; VIH ≥ 2V, VIL ≤ 0.4V. Can be RC-delayed for programmable soft-start timing. |
| 23 | VIN3 | power_in | Power input pin of CH3 buck converter (2.7V to 5.5V). Recommended to place a 10uF MLCC capacitor between VIN3 and PGND3. |
| 24 | LX3 | output | Internal MOSFET switching output of CH3. Connect to the LC low-pass filter (inductor + output capacitor) to obtain a stable DC output voltage; high dV/dt node. |
| 25 | EP | power_in | Exposed thermal pad. Must be soldered to a large PCB copper plane and connected to GND for appropriate heat dissipation. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Everanalog IC design |
| Package | QFN-24-EP(4x4) |
| Category | PMIC |
| Pins | 25 |
Ordering variants
EA3058QDR
CAD (KiCad official)
- Symbol:
EA3058QDR - Footprint:
Package_DFN_QFN:QFN-24-1EP_4x4mm_P0.5mm_EP2.7x2.7mm - 3D model: QFN-24-EP(4x4) (KiCad packages3D, STEP)
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Everanalog IC design datasheet (None pp, sha256
2e41cd67e50ea7f7, retrieved 2026-08-17, tier: lcsc) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).