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DS8242-50SS3

DSTECH · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23

DS8242-50SS3 from DSTECH, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 GND power_in Ground reference for the regulator. Connect directly to system ground with a wide, short trace back to the input and output capacitor grounds to minimize parasitic inductance.
2 VOUT power_out Regulated output of the LDO, fixed at 5.0V (±1%) for the -50 variant. Supplies up to 500mA continuous load current with a 700mA (typ.) current limit. Requires a 1µF-22µF ceramic/tantalum capacitor (min 1mΩ ESR) placed close to the pin for stability.
3 VIN power_in Input supply voltage, 2.0V to 24V (absolute max 30V). Decouple with a 1µF or larger ceramic capacitor placed close to the pin. Dropout is 0.35V at 100mA for VOUT ≥ 5V.

Key specifications

Parameter Value
Manufacturer DSTECH
Package SOT-23
Category PMIC
Pins 3

Ordering variants

  • DS8242-50SS3
  • DS8242-50SS3S5
  • DS8242-50SS3A3
  • DS8242-50SS3A3L
  • DS8242-50SS3A3R

CAD (KiCad official)

  • Symbol: DS8242-50SS3
  • Footprint: Package_TO_SOT_SMD:SOT-23
  • 3D model: SOT-23 (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: DSTECH datasheet (None pp, sha256 02f10bfeea1c3ede, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

Symbol & Footprint

Schematic Symbol

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PCB Footprint

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