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dio8950so8
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DIOO LED Drivers, SOIC-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.
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DIOO · LED Drivers · SOIC-8
DIO8950SO8 from DIOO, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Ground pin. Device return; tie to pin 4 (also GND) at a single star point near the current-sense resistor. |
| 2 | CS | input | Current-sense input. Connect the sense resistor RS between LEDN and GND; ILED = VREF / RS where VREF ≈ 153 mV (146-160 mV). Internal cycle-by-cycle CS clamp at VCS_LIMIT ≈ 3.8 V (3.6-4 V max). |
| 3 | COMP | passive | Loop-compensation pin for the internal transconductance error amplifier. Connect a compensation capacitor (≈1 µF recommended) between COMP and GND to set the current-loop crossover well below the line frequency. Internal pull-up current ICOMP ≈ 7 µA (6-8 µA) when 1.2 V < VCOMP < 2.4 V. |
| 4 | GND | power_in | Ground pin (second GND). Internally tied to pin 1; both must connect to the system ground plane. |
| 5 | VIN | power_in | IC supply pin, charged from the HV JFET on pin 8. Must be locally bypassed to GND with CVIN. UVLO turn-on ≈ 13.8 V (12.8-14.8 V), turn-off ≈ 8.8 V (8-9.6 V); internal OVP shunt clamps at VVIN,OVP ≈ 18.2 V (16.4-20 V) with 3-8 mA shunt. Recommended operating range 10-13.6 V, absolute max 30 V. |
| 6 | FB | input | Output-voltage feedback input from a resistor divider off the boost output. Used to detect LED-open / output OVP: when VFB > VFB_H ≈ 1.6 V (1.5-1.7 V) the driver is shut down and the HV path is disconnected until VIN falls to VVIN,OFF; also monitored against VFB_L ≈ 300 mV (255-345 mV). OVP leading-edge blanking TLEB ≈ 1 µs. Absolute-max input -0.3 to 5 V. |
| 7 | DRV | output | Gate-driver output for the external primary boost MOSFET. Rise time ≈100 ns and fall time ≈50 ns into CLOAD = 1 nF; max switching frequency fMAX ≈ 130 kHz (COMP < 1.2 V), max on-time TON,MAX ≈ 35 µs. Absolute-max DRV voltage 20 V. |
| 8 | HV | power_in | High-voltage JFET input. Connects to the rectified BUS voltage and charges CVIN through the internal HV JFET at startup, eliminating the need for an auxiliary winding. Recommended operating range 30-600 V; absolute max 700 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | DIOO |
| Package | SOIC-8 |
| Category | LED-drv |
| Pins | 8 |
Ordering variants
DIO8950SO8
CAD (KiCad official)
- Symbol:
DIO8950SO8 - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: DIOO datasheet (None pp, sha256
eabb82b7d885fed3, retrieved 2026-08-17, tier: lcsc) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).