DIO6970TST6 from DIOO, in a TSOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	GND	power_in	Power ground return. Connect to the ground plane with a low-impedance path; input capacitor CIN loop area to this pin must be minimized.
2	SW	power_out	Switching node. Connect to the output inductor. This is the common node between the internal high-side and low-side MOSFETs; keep the PCB copper area minimized to reduce noise.
3	VIN	power_in	Power input, 4.5V to 24V (28V abs max). Bypass to GND with a low-ESR ceramic capacitor (≥4.7µF X5R) placed close to the pin.
4	FB	input	Output feedback pin. Connect to the center tap of the output resistor divider to program VOUT = 0.8V × (1 + R1/R2). Internal reference is 0.8V typical (0.788-0.812V). Optional 10-47pF feed-forward cap in parallel with R1 speeds up transient response.
5	EN	input	Enable control input. Pull high (VENH ≥ 1.5V) to enable the regulator; pull low (VENL ≤ 0.4V) to shut down. Do not float. Add a 1MΩ pull-down to GND if driven from a high-impedance source connected to a battery rail.
6	BS	passive	Bootstrap pin for the high-side switch gate driver. Connect a 100nF (0.1µF) low-ESR ceramic capacitor between BS and SW to form a floating supply. Absolute max is SW+6V.

Key specifications

Parameter	Value
Manufacturer	DIOO
Package	TSOT-23-6
Category	PMIC
Pins	6

Ordering variants

Same part, different packaging or reel option.

DIO6970TST6

CAD (KiCad official)

Symbol: DIO6970TST6
Footprint: Package_TO_SOT_SMD:SOT-23-6
3D model: TSOT-23-6 (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: DIOO datasheet (10 pp, sha256 a799748e790264ad, retrieved 2026-08-17, tier: lcsc)
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF