DIO2133CT14 from DIOO, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	+INR	input	Right-channel positive (non-inverting) differential audio input. AC-coupled through CIN to source; gain set by external RIN and Rfb.
2	-INR	input	Right-channel negative (inverting) differential audio input. Feedback resistor Rfb connects between this pin and OUTR to set closed-loop gain (±1V/V to ±10V/V).
3	OUTR	output	Right-channel audio output. Drives 600Ω load direct-coupled (no DC-blocking cap required) up to 3Vrms with 5V supply; HBM ESD-protected to 8kV.
4	SGND	power_in	Signal (analog) ground reference for the audio input stages. Tie to system analog ground plane; keep isolated from PGND return currents.
5	EN	input	Chip enable, active-high (VIH ≥ 1.2V at VDD=5V, ≥1.1V at 3.3V; VIL ≤ 0.4V/0.3V). Driving EN low places the device in shutdown with ~90dB input-to-output attenuation and ≤1mA IDD.
6	PVSS	power_out	Negative supply rail generated by the internal charge pump. Bypass to ground with a 1µF CPVSS reservoir capacitor; provides the negative rail that eliminates the need for output DC-blocking capacitors.
7	CN	bidirectional	Charge-pump flying capacitor negative terminal. Connect a 1µF CPUMP capacitor between CP (pin 8) and CN; switching frequency ≈310kHz.
8	CP	bidirectional	Charge-pump flying capacitor positive terminal. Connect a 1µF CPUMP capacitor between CP and CN (pin 7).
9	PVDD	power_in	Positive supply input, 3.0V to 5.5V (absolute max 7.5V). Powers the driver and charge pump; bypass locally to PGND. IDD ≈ 11mA at 3.3V, 12mA at 5V (no load).
10	PGND	power_in	Power ground return for PVDD and the charge-pump output stage. Route as low-impedance path to the supply bypass; separate from SGND at a single star point.
11	UVP	input	External under-voltage detection input; typical threshold VUVP = 1.11V (1.08V min, 1.14V max) with 5µA hysteresis current. Drive from a resistor divider off the monitored rail; when the divided voltage falls below VUVP the outputs are muted for pop-free shutdown.
12	OUTL	output	Left-channel audio output. Drives 600Ω load direct-coupled (no DC-blocking cap required) up to 3Vrms with 5V supply; HBM ESD-protected to 8kV.
13	-INL	input	Left-channel negative (inverting) differential audio input. Feedback resistor Rfb connects between this pin and OUTL to set closed-loop gain (±1V/V to ±10V/V).
14	+INL	input	Left-channel positive (non-inverting) differential audio input. AC-coupled through CIN to source; gain set by external RIN and Rfb.

Key specifications

Parameter	Value
Manufacturer	DIOO
Package	TSSOP-14
Category	Op-amp/Cmp
Pins	14

Ordering variants

Same part, different packaging or reel option.

DIO2133CT14

CAD (KiCad official)

Symbol: DIO2133CT14
Footprint: Package_SO:TSSOP-14_4.4x5mm_P0.65mm
3D model: TSSOP-14 (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File	Size	Use it when
`dio2133ct14.step`	194 KB	You want the bare part, or you mark your own boards.
`dio2133ct14-etched.step`	2.4 MB	You want the part with `DIO2133CT14` already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 611 faces against 237 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: DIOO datasheet (14 pp, sha256 f9f0b81bf6b10241, retrieved 2026-08-17, tier: lcsc)
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF