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DG412DQ-T1-E3
Public Unreviewedby Ray
Vishay Analog Switches / Multiplexers, TSSOP-16. Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
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markdownDG412DQ-T1-E3
Vishay · Analog Switches / Multiplexers · TSSOP-16
DG412DQ-T1-E3 from Vishay, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | IN1 | input | TTL/CMOS logic control input for switch 1. Logic '0' ≤ 0.8 V (SW1 OFF), logic '1' ≥ 2.4 V (SW1 ON). Input current ±0.5 µA max. |
| 2 | D1 | passive | Analog drain terminal of switch 1. Bidirectional analog signal terminal, ±15 V analog range, RDS(on) ≈ 25 Ω. Conducts equally well in both directions when ON. |
| 3 | S1 | passive | Analog source terminal of switch 1. Bidirectional analog signal terminal, ±15 V analog range. Continuous current 30 mA max, peak 100 mA (1 ms, 10% DC). |
| 4 | V- | power_in | Negative analog supply. Typically -15 V; V+ to V- must not exceed 44 V. Sets negative rail of analog signal range. |
| 5 | GND | power_in | Ground reference. GND to V- limited to 25 V max. |
| 6 | S4 | passive | Analog source terminal of switch 4. Bidirectional analog signal terminal, ±15 V analog range. |
| 7 | D4 | passive | Analog drain terminal of switch 4. Bidirectional analog signal terminal, ±15 V analog range, RDS(on) ≈ 25 Ω. |
| 8 | IN4 | input | TTL/CMOS logic control input for switch 4. Logic '0' ≤ 0.8 V (SW4 OFF), logic '1' ≥ 2.4 V (SW4 ON). |
| 9 | IN3 | input | TTL/CMOS logic control input for switch 3. Logic '0' ≤ 0.8 V (SW3 OFF), logic '1' ≥ 2.4 V (SW3 ON). |
| 10 | D3 | passive | Analog drain terminal of switch 3. Bidirectional analog signal terminal, ±15 V analog range, RDS(on) ≈ 25 Ω. |
| 11 | S3 | passive | Analog source terminal of switch 3. Bidirectional analog signal terminal, ±15 V analog range. |
| 12 | VL | power_in | Logic supply voltage (typically +5 V). Powers the TTL/CMOS-compatible digital control interface. Range (GND - 0.3) to (V+) + 0.3. |
| 13 | V+ | power_in | Positive analog supply. Typically +15 V; V+ to V- must not exceed 44 V. Sets positive rail of analog signal range. |
| 14 | S2 | passive | Analog source terminal of switch 2. Bidirectional analog signal terminal, ±15 V analog range. |
| 15 | D2 | passive | Analog drain terminal of switch 2. Bidirectional analog signal terminal, ±15 V analog range, RDS(on) ≈ 25 Ω. |
| 16 | IN2 | input | TTL/CMOS logic control input for switch 2. Logic '0' ≤ 0.8 V (SW2 OFF), logic '1' ≥ 2.4 V (SW2 ON). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Vishay |
| Package | TSSOP-16 |
| Category | Comm/UART |
| Pins | 16 |
Ordering variants
Same part, different packaging or reel option.
DG412DQ-T1-E3DQ-E3DG412DQ-T1-E3DG412DQ-T1-E3DJDG412DQ-T1-E3DJ-E3DG412DQ-T1-E3DYDG412DQ-T1-E3DY-E3DG412DQ-T1-E3DY-T1DG412DQ-T1-E3DY-T1-E3
CAD (KiCad official)
- Symbol:
DG412DQ-T1-E3 - Footprint:
Package_SO:TSSOP-16_4.4x5mm_P0.65mm - 3D model: TSSOP-16 (KiCad packages3D, STEP)
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Vishay datasheet (14 pp, sha256
7d2688acee1bfd79, retrieved 2026-08-17, tier: lcsc) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).