Loads on click. Unloads when scrolled away or the tab is hidden.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads on click. Unloads when scrolled away or the tab is hidden.

PCB Footprint

Open full view ↗
Loads on click. Unloads when scrolled away or the tab is hidden.
Loads on click. Unloads when scrolled away or the tab is hidden.
Download PDF
Contents

README

markdown

DG409LEDQ-T1-GE3

Vishay · Analog Switches, Multiplexers · TSSOP-16

DG409LEDQ-T1-GE3 from Vishay, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 A0 input Address input bit 0 (LSB). TTL/CMOS/LV (3 V) logic compatible digital control input. Selects which of the four differential channel pairs is connected to Da/Db when EN is high.
2 EN input Enable input. When EN = logic low, all switches are OFF regardless of A0/A1. When EN = logic high, the addressed differential channel pair is ON. TTL/CMOS/LV (3 V) compatible.
3 V- power_in Negative analog power supply. Tie to GND for single-supply operation (+3 V to +16 V) or to a negative rail for dual-supply operation (±3 V to ±8 V). V+ to V- rated 18 V max.
4 S1a passive Source pin, channel 1, side A. Analog input/output of differential channel 1 (a-side). Connects to Da when A1=0, A0=0, EN=1. Bidirectional analog signal path with 17 Ω typical on-resistance.
5 S2a passive Source pin, channel 2, side A. Analog input/output of differential channel 2 (a-side). Connects to Da when A1=0, A0=1, EN=1.
6 S3a passive Source pin, channel 3, side A. Analog input/output of differential channel 3 (a-side). Connects to Da when A1=1, A0=0, EN=1.
7 S4a passive Source pin, channel 4, side A. Analog input/output of differential channel 4 (a-side). Connects to Da when A1=1, A0=1, EN=1.
8 Da passive Common drain, side A. Analog output/input of the a-side 4:1 multiplexer; connects to the selected S1a..S4a. Bidirectional; channels conduct equally well in both directions.
9 Db passive Common drain, side B. Analog output/input of the b-side 4:1 multiplexer; connects to the selected S1b..S4b. Bidirectional.
10 S4b passive Source pin, channel 4, side B. Analog input/output of differential channel 4 (b-side). Connects to Db when A1=1, A0=1, EN=1.
11 S3b passive Source pin, channel 3, side B. Analog input/output of differential channel 3 (b-side). Connects to Db when A1=1, A0=0, EN=1.
12 S2b passive Source pin, channel 2, side B. Analog input/output of differential channel 2 (b-side). Connects to Db when A1=0, A0=1, EN=1.
13 S1b passive Source pin, channel 1, side B. Analog input/output of differential channel 1 (b-side). Connects to Db when A1=0, A0=0, EN=1.
14 V+ power_in Positive analog power supply. +3 V to +16 V single-supply, or up to +8 V for ±8 V dual-supply operation. V+ to V- rated 18 V absolute max.
15 GND power_in Digital and logic ground reference for the address (A0/A1) and enable (EN) inputs.
16 A1 input Address input bit 1 (MSB). TTL/CMOS/LV (3 V) compatible digital control input. Together with A0 selects one of the four differential channel pairs when EN is high.

Key specifications

Parameter Value
Manufacturer Vishay
Package TSSOP-16
Category Interface
Pins 16

Ordering variants

Same part, different packaging or reel option.

  • DG409LEDQ-GE3
  • DG409LEDQ-T1-GE3
  • DG409LEDY-GE3
  • DG409LEDY-T1-GE3
  • DG409LEDN-T1-GE4

CAD (KiCad official)

  • Symbol: DG409LEDQ-T1-GE3
  • Footprint: Package_SO:TSSOP-16_4.4x5mm_P0.65mm
  • 3D model: TSSOP-16 (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Vishay datasheet (18 pp, sha256 25c17230a1edebf9, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF